DMA_HRS field descriptions (continued)
Field Description
The HRS bit for its respective channel remains asserted for the period when a Hardware Request is
Present on the Channel. After the Request is completed and Channel is free, the HRS bit is automatically
cleared by hardware.
0 A hardware service request for channel 15 is not present
1 A hardware service request for channel 15 is present
14
HRS14
Hardware Request Status Channel 14
The HRS bit for its respective channel remains asserted for the period when a Hardware Request is
Present on the Channel. After the Request is completed and Channel is free, the HRS bit is automatically
cleared by hardware.
0 A hardware service request for channel 14 is not present
1 A hardware service request for channel 14 is present
13
HRS13
Hardware Request Status Channel 13
The HRS bit for its respective channel remains asserted for the period when a Hardware Request is
Present on the Channel. After the Request is completed and Channel is free, the HRS bit is automatically
cleared by hardware.
0 A hardware service request for channel 13 is not present
1 A hardware service request for channel 13 is present
12
HRS12
Hardware Request Status Channel 12
The HRS bit for its respective channel remains asserted for the period when a Hardware Request is
Present on the Channel. After the Request is completed and Channel is free, the HRS bit is automatically
cleared by hardware.
0 A hardware service request for channel 12 is not present
1 A hardware service request for channel 12 is present
11
HRS11
Hardware Request Status Channel 11
The HRS bit for its respective channel remains asserted for the period when a Hardware Request is
Present on the Channel. After the Request is completed and Channel is free, the HRS bit is automatically
cleared by hardware.
0 A hardware service request for channel 11 is not present
1 A hardware service request for channel 11 is present
10
HRS10
Hardware Request Status Channel 10
The HRS bit for its respective channel remains asserted for the period when a Hardware Request is
Present on the Channel. After the Request is completed and Channel is free, the HRS bit is automatically
cleared by hardware.
0 A hardware service request for channel 10 is not present
1 A hardware service request for channel 10 is present
9
HRS9
Hardware Request Status Channel 9
The HRS bit for its respective channel remains asserted for the period when a Hardware Request is
Present on the Channel. After the Request is completed and Channel is free, the HRS bit is automatically
cleared by hardware.
Table continues on the next page...
Memory map/register definition
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
464 NXP Semiconductors
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