DMA_HRS field descriptions (continued)
Field Description
0 A hardware service request for channel 9 is not present
1 A hardware service request for channel 9 is present
8
HRS8
Hardware Request Status Channel 8
The HRS bit for its respective channel remains asserted for the period when a Hardware Request is
Present on the Channel. After the Request is completed and Channel is free, the HRS bit is automatically
cleared by hardware.
0 A hardware service request for channel 8 is not present
1 A hardware service request for channel 8 is present
7
HRS7
Hardware Request Status Channel 7
The HRS bit for its respective channel remains asserted for the period when a Hardware Request is
Present on the Channel. After the Request is completed and Channel is free, the HRS bit is automatically
cleared by hardware.
0 A hardware service request for channel 7 is not present
1 A hardware service request for channel 7 is present
6
HRS6
Hardware Request Status Channel 6
The HRS bit for its respective channel remains asserted for the period when a Hardware Request is
Present on the Channel. After the Request is completed and Channel is free, the HRS bit is automatically
cleared by hardware.
0 A hardware service request for channel 6 is not present
1 A hardware service request for channel 6 is present
5
HRS5
Hardware Request Status Channel 5
The HRS bit for its respective channel remains asserted for the period when a Hardware Request is
Present on the Channel. After the Request is completed and Channel is free, the HRS bit is automatically
cleared by hardware.
0 A hardware service request for channel 5 is not present
1 A hardware service request for channel 5 is present
4
HRS4
Hardware Request Status Channel 4
The HRS bit for its respective channel remains asserted for the period when a Hardware Request is
Present on the Channel. After the Request is completed and Channel is free, the HRS bit is automatically
cleared by hardware.
0 A hardware service request for channel 4 is not present
1 A hardware service request for channel 4 is present
3
HRS3
Hardware Request Status Channel 3
The HRS bit for its respective channel remains asserted for the period when a Hardware Request is
Present on the Channel. After the Request is completed and Channel is free, the HRS bit is automatically
cleared by hardware.
0 A hardware service request for channel 3 is not present
1 A hardware service request for channel 3 is present
2
HRS2
Hardware Request Status Channel 2
Table continues on the next page...
Chapter 22 Enhanced Direct Memory Access (eDMA)
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 465
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