NXP Semiconductors K22F series User Manual

Section number Title Page
4.3.1 Alternate Non-Volatile IRC User Trim Description....................................................................................143
4.4 SRAM memory map.....................................................................................................................................................143
4.5 Peripheral bridge (AIPS-Lite) memory map.................................................................................................................144
4.5.1 Read-after-write sequence and required serialization of memory operations..............................................144
4.5.2 Peripheral Bridge 0 (AIPS-Lite 0) Memory Map........................................................................................ 144
4.6 Private Peripheral Bus (PPB) memory map..................................................................................................................148
Chapter 5
Clock Distribution
5.1 Introduction...................................................................................................................................................................151
5.2 Programming model......................................................................................................................................................151
5.3 High-Level device clocking diagram............................................................................................................................151
5.4 Clock definitions...........................................................................................................................................................152
5.4.1 Device clock summary.................................................................................................................................153
5.5 Internal clocking requirements..................................................................................................................................... 156
5.5.1 Clock divider values after reset....................................................................................................................157
5.5.2 VLPR mode clocking...................................................................................................................................157
5.6 Clock Gating.................................................................................................................................................................158
5.7 Module clocks...............................................................................................................................................................158
5.7.1 PMC 1-kHz LPO clock................................................................................................................................160
5.7.2 IRC 48MHz clock........................................................................................................................................ 160
5.7.3 WDOG clocking.......................................................................................................................................... 161
5.7.4 Debug trace clock.........................................................................................................................................161
5.7.5 PORT digital filter clocking.........................................................................................................................162
5.7.6 LPTMR clocking..........................................................................................................................................162
5.7.7 RTC_CLKOUT and CLKOUT32K clocking..............................................................................................163
5.7.8 USB FS OTG Controller clocking...............................................................................................................164
5.7.9 UART clocking............................................................................................................................................165
5.7.10 LPUART0 clocking..................................................................................................................................... 165
5.7.11 I2S/SAI clocking..........................................................................................................................................166
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
6 NXP Semiconductors

NXP Semiconductors K22F series Specifications

General

Brand	NXP Semiconductors
Model	K22F series
Category	Controller
Language	English