NXP Semiconductors K22F series - Page 5

Section number Title Page
3.6.1 CRC Configuration...................................................................................................................................... 95
3.6.2 RNG Configuration......................................................................................................................................96
3.7 Analog...........................................................................................................................................................................97
3.7.1 16-bit SAR ADC Configuration.................................................................................................................. 97
3.7.2 CMP Configuration......................................................................................................................................104
3.7.3 12-bit DAC Configuration........................................................................................................................... 106
3.7.4 VREF Configuration....................................................................................................................................107
3.8 Timers........................................................................................................................................................................... 108
3.8.1 PDB Configuration...................................................................................................................................... 108
3.8.2 FlexTimer Configuration............................................................................................................................. 111
3.8.3 PIT Configuration........................................................................................................................................ 117
3.8.4 Low-power timer configuration...................................................................................................................118
3.8.5 RTC configuration....................................................................................................................................... 120
3.9 Communication interfaces............................................................................................................................................ 121
3.9.1 Universal Serial Bus (USB) FS Subsystem................................................................................................. 121
3.9.2 SPI configuration......................................................................................................................................... 126
3.9.3 I2C Configuration........................................................................................................................................ 130
3.9.4 UART Configuration................................................................................................................................... 131
3.9.5 LPUART configuration................................................................................................................................133
3.9.6 I2S configuration..........................................................................................................................................134
3.10 Human-machine interfaces........................................................................................................................................... 137
3.10.1 GPIO configuration......................................................................................................................................137
Chapter 4
Memory Map
4.1 Introduction...................................................................................................................................................................139
4.2 System memory map.....................................................................................................................................................139
4.2.1 Aliased bit-band regions.............................................................................................................................. 141
4.2.2 Flash Access Control Introduction...............................................................................................................142
4.3 Flash Memory Map.......................................................................................................................................................142
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 5