Address: 4002_0000h base + 18h offset + (1d × i), where i=0d to 7d
Bit 7 6 5 4 3 2 1 0
Read XA
Write
Reset
x* x* x* x* x* x* x* x*
* Notes:
x = Undefined at reset.•
FTFA_XACCn field descriptions
Field Description
XA Execute-only access control
0 Associated segment is accessible in execute mode only (as an instruction fetch)
1 Associated segment is accessible as data or in execute mode
29.3.3.8 Supervisor-only Access Registers (FTFA_SACCn)
The SACC registers define which program flash segments are restricted to supervisor
only or user and supervisor access.
The eight SACC registers allow up to 64 restricted segments of equal memory size.
Supervisor-only access register Program flash supervisor-only access bits
SACCH0 SA[63:56]
SACCH1 SA[55:48]
SACCH2 SA[47:40]
SACCH3 SA[39:32]
SACCL0 SA[31:24]
SACCL1 SA[23:16]
SACCL2 SA[15:8]
SACCL3 SA[7:0]
During the reset sequence, the SACC registers are loaded with the logical AND of
Program Flash IFR addresses A and B as indicated in the following table.
Supervisor-only access register
Program Flash IFR address A Program Flash IFR address B
SACCH0 0xB3 0xBB
SACCH1 0xB2 0xBA
SACCH2 0xB1 0xB9
SACCH3 0xB0 0xB8
Table continues on the next page...
Chapter 29 Flash Memory Module (FTFA)
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 645
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