3.3.4.1 Wake-up Sources
The device uses the following internal peripheral and external pin inputs as wakeup
sources to the LLWU module. LLWU_Px are external pin inputs, and LLWU_M0IF-
M7IF are connections to the internal peripheral interrupt flags.
NOTE
In addition to the LLWU wakeup sources, the device also
wakes from low power modes when NMI or RESET pins are
enabled and the respective pin is asserted.
Table 3-14. Wakeup sources for LLWU inputs
Input Wakeup source
LLWU_P0 PTE1/LLWU_P0 pin
LLWU_P1 PTE2/LLWU_P1 pin
LLWU_P2 PTE4/LLWU_P2 pin
LLWU_P3 PTA4/LLWU_P3 pin
1
LLWU_P4 PTA13/LLWU_P4 pin
LLWU_P5 PTB0/LLWU_P5 pin
LLWU_P6 PTC1/LLWU_P6 pin
LLWU_P7 PTC3/LLWU_P7 pin
LLWU_P8 PTC4/LLWU_P8 pin
LLWU_P9 PTC5/LLWU_P9 pin
LLWU_P10 PTC6/LLWU_P10 pin
LLWU_P11 PTC11/LLWU_P11 pin
LLWU_P12 PTD0/LLWU_P12 pin
LLWU_P13 PTD2/LLWU_P13 pin
LLWU_P14 PTD4/LLWU_P14 pin
LLWU_P15 PTD6/LLWU_P15 pin
LLWU_M0IF LPTMR
2
LLWU_M1IF CMP0
2
LLWU_M2IF CMP1
2
LLWU_M3IF Reserved
LLWU_M4IF Reserved
LLWU_M5IF RTC Alarm
2
LLWU_M6IF Reserved
LLWU_M7IF RTC Seconds
2
1. The EZP_CS signal is checked only on Chip Reset not VLLS, so a VLLS wakeup via a non-reset source does not cause
EzPort mode entry. If NMI was enabled on entry to LLS/VLLS, asserting the NMI pin generates an NMI interrupt on exit
from the low power mode. NMI can also be disabled via the FOPT[NMI_DIS] bit.
2. Requires the peripheral and the peripheral interrupt to be enabled. The LLWU's WUME bit enables the internal module flag
as a wakeup input. After wakeup, the flags are cleared based on the peripheral clearing mechanism.
System modules
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
70 NXP Semiconductors
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