NXP Semiconductors K22F series - Page 8

Section number Title Page
Chapter 8
Security
8.1 Introduction...................................................................................................................................................................195
8.2 Flash Security............................................................................................................................................................... 195
8.3 Security Interactions with other Modules.....................................................................................................................196
8.3.1 Security interactions with FlexBus.............................................................................................................. 196
8.3.2 Security Interactions with EzPort................................................................................................................ 196
8.3.3 Security Interactions with Debug.................................................................................................................196
Chapter 9
Debug
9.1 Introduction...................................................................................................................................................................199
9.1.1 References....................................................................................................................................................201
9.2 The Debug Port.............................................................................................................................................................201
9.2.1 JTAG-to-SWD change sequence................................................................................................................. 202
9.2.2 JTAG-to-cJTAG change sequence...............................................................................................................202
9.3 Debug Port Pin Descriptions.........................................................................................................................................203
9.4 System TAP connection................................................................................................................................................203
9.4.1 IR Codes.......................................................................................................................................................203
9.5 JTAG status and control registers.................................................................................................................................204
9.5.1 MDM-AP Control Register..........................................................................................................................205
9.5.2 MDM-AP Status Register............................................................................................................................ 207
9.6 Debug Resets................................................................................................................................................................ 208
9.7 AHB-AP........................................................................................................................................................................209
9.8 ITM............................................................................................................................................................................... 209
9.9 Core Trace Connectivity...............................................................................................................................................210
9.10 TPIU..............................................................................................................................................................................210
9.11 DWT............................................................................................................................................................................. 210
9.12 Debug in Low Power Modes........................................................................................................................................ 211
9.12.1 Debug Module State in Low Power Modes.................................................................................................211
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
8 NXP Semiconductors