Low-power universal asynchronous receiver transmitter (LPUART) RM0444
1088/1390 RM0444 Rev 5
34.3 LPUART implementation
Below the description of LPUART implementation in comparison with USART.
Table 188. STM32G0x1 features
USART / LPUART instances
STM32G0x31xx,
STM32G0x41xx
STM32G0x71xx,
STM32G0x81xx
USART1 FULL FULL
USART2 BASIC FULL
USART3 - BASIC
USART4 - BASIC
LPUART1 LP LP
Table 189. USART / LPUART features
USART / LPUART modes/features
(1)
Full feature set Basic feature set
Low-power
feature set
Hardware flow control for modem X X X
Continuous communication using DMA X X X
Multiprocessor communication X X X
Synchronous mode (Master/Slave) X X -
Smartcard mode X - -
Single-wire Half-duplex communication X X X
IrDA SIR ENDEC block X - -
LIN mode X - -
Dual clock domain and wakeup from low-power mode X - X
Receiver timeout interrupt X - -
Modbus communication X - -
Auto baud rate detection X - -
Driver Enable X X X
USART data length 7, 8 and 9 bits
Tx/Rx FIFO X - X
Tx/Rx FIFO size 8 - 8
Prescaler X - X
1. X = supported.
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