RM0444 Rev 5 695/1390
RM0444 General-purpose timers (TIM2/TIM3/TIM4)
701
22.4.26 TIM3 alternate function option register 1 (TIM3_AF1)
Address offset: 0x60
Reset value: 0x0000 0000
22.4.27 TIM4 alternate function option register 1 (TIM4_AF1)
Address offset: 0x60
Reset value: 0x0000 0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. ETRSEL[3:2]
rw rw
1514131211109876543210
ETRSEL[1:0] Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
rw rw
Bits 31:18 Reserved, must be kept at reset value.
Bits 17:14 ETRSEL[3:0]: ETR source selection
These bits select the ETR input source.
0000: ETR legacy mode
0001: COMP1 output
0010: COMP2 output
0110: COMP3 output
(1)
Others: Reserved
Bits 13:0 Reserved, must be kept at reset value.
1. Available on STM32G0B1xx and STM32G0C1xx salestypes only.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. ETRSEL[3:2]
rw rw
1514131211109876543210
ETRSEL[1:0] Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
rw rw
Bits 31:18 Reserved, must be kept at reset value.
Bits 17:14 ETRSEL[3:0]: ETR source selection
These bits select the ETR input source.
0000: ETR legacy mode
0001: COMP1 output
0010: COMP2 output
0110: COMP3 output
(1)
Others: Reserved
Bits 13:0 Reserved, must be kept at reset value.
1. Available on STM32G0B1xx and STM32G0C1xx salestypes only.