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ST STM32G0 1 Series User Manual

ST STM32G0 1 Series
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RM0444 Rev 5 729/1390
RM0444 General-purpose timers (TIM14)
740
24.3.11 Using timer output as trigger for other timers (TIM14)
The timers with one channel only do not feature a master mode. However, the OC1 output
signal can be used to trigger some other timers (including timers described in other sections
of this document). Check the “TIMx internal trigger connection” table of any TIMx_SMCR
register on the device to identify which timers can be targeted as slave.
The OC1 signal pulse width must be programmed to be at least 2 clock cycles of the
destination timer, to make sure the slave timer will detect the trigger.
For instance, if the destination's timer CK_INT clock is 4 times slower than the source timer,
the OC1 pulse width must be 8 clock cycles.
24.3.12 Debug mode
When the microcontroller enters debug mode (Cortex
®
-M0+ core halted), the TIMx counter
either continues to work normally or stops, depending on DBG_TIMx_STOP configuration
bit in DBG module. For more details, refer to Section 40.9.2: Debug support for timers,
watchdog and I
2
C.

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ST STM32G0 1 Series Specifications

General IconGeneral
BrandST
ModelSTM32G0 1 Series
CategoryMicrocontrollers
LanguageEnglish

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