System configuration controller (SYSCFG) RM0444
266/1390 RM0444 Rev 5
8.1.34 SYSCFG interrupt line 31 status register (SYSCFG_ITLINE31)
Address offset: 0xFC
System reset value: 0x0000 0000
8.1.35 SYSCFG register map
The following table gives the SYSCFG register map and the reset values.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
CEC
(1)
r
1. Only significant on devices integrating CEC, otherwise reserved. Refer to Section 1.4: Availability of peripherals.
Bits 31:1 Reserved, must be kept at reset value.
Bit 0 CEC: CEC interrupt request pending (EXTI line 27)
(1)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
AES
(1)
RNG
(1)
rr
1. Onldy significant on devices integrating the corresponding peripheral, otherwise reserved. Refer to Section 1.4: Availability
of peripherals.
Bits 31:2 Reserved, must be kept at reset value.
Bit 1 AES: AES interrupt request pending
(1)
Bit 0 RNG: RNG interrupt request pending
(1)
Table 44. SYSCFG register map and reset values
Offset Register
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0x00
SYSCFG_CFGR1
Res.
Res.
Res.
Res.
Res.
Res.
Res.
I2C3_FMP
I2C_PA10_FMP
I2C_PA9_FMP
I2C2_FMP
I2C1_FMP
I2C_PB9_FMP
I2C_PB8_FMP
I2C_PB7_FMP
I2C_PB6_FMP
Res.
Res.
Res.
Res.
Res.
UCPD2_STROBE
UCPD2_STROBE
BOOSTEN
IR_MOD
IR_POL
PA12_RMP
PA11_RMP
Res.
MEM_MODE[1:0]
Reset value 000000000 00000000 XX
0x04 to
0x17
Reserved Reserved
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