RM0444 Rev 5 967/1390
RM0444 Inter-integrated circuit (I2C) interface
997
t
LOW:MEXT
for a master. As the standard specifies only a maximum, the user can choose
the same value for the both.
Then the timer is enabled by setting the TEXTEN bit in the I2C_TIMEOUTR register.
If the SMBus peripheral performs a cumulative SCL stretch for a time greater than
(TIMEOUTB+1) x 2048 x t
I2CCLK
, and in the timeout interval described in Bus idle
detection on page 965 section, the TIMEOUT flag is set in the I2C_ISR register.
Refer to Table 174: Examples of TIMEOUTB settings for various I2CCLK frequencies
Caution: Changing the TIMEOUTB configuration is not allowed when the TEXTEN bit is set.
Bus Idle detection
In order to enable the t
IDLE
check, the 12-bit TIMEOUTA[11:0] field must be programmed
with the timer reload value in order to obtain the t
IDLE
parameter. The TIDLE bit must be
configured to ‘1 in order to detect both SCL and SDA high level timeout.
Then the timer is enabled by setting the TIMOUTEN bit in the I2C_TIMEOUTR register.
If both the SCL and SDA lines remain high for a time greater than (TIMEOUTA+1) x 4 x
t
I2CCLK
, the TIMEOUT flag is set in the I2C_ISR register.
Refer to Table 175: Examples of TIMEOUTA settings for various I2CCLK frequencies (max
t
IDLE
= 50 µs)
Caution: Changing the TIMEOUTA and TIDLE configuration is not allowed when the TIMEOUTEN is
set.
32.4.14 SMBus: I2C_TIMEOUTR register configuration examples
This section is relevant only when SMBus feature is supported. Refer to Section 32.3: I2C
implementation.
• Configuring the maximum duration of t
TIMEOUT
to 25 ms:
• Configuring the maximum duration of t
LOW:SEXT
and t
LOW:MEXT
to 8 ms:
Table 173. Examples of TIMEOUTA settings for various I2CCLK frequencies
(max t
TIMEOUT
= 25 ms)
f
I2CCLK
TIMEOUTA[11:0] bits TIDLE bit TIMEOUTEN bit t
TIMEOUT
8 MHz 0x61 0 1 98 x 2048 x 125 ns = 25 ms
16 MHz 0xC3 0 1 196 x 2048 x 62.5 ns = 25 ms
48 MHz 0x249 0 1 586 x 2048 x 20.08 ns = 25 ms
Table 174. Examples of TIMEOUTB settings for various I2CCLK frequencies
f
I2CCLK
TIMEOUTB[11:0] bits TEXTEN bit t
LOW:EXT
8 MHz 0x1F 1 32 x 2048 x 125 ns = 8 ms
16 MHz 0x3F 1 64 x 2048 x 62.5 ns = 8 ms
48 MHz 0xBB 1 188 x 2048 x 20.08 ns = 8 ms
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