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ST STM32G0 1 Series

ST STM32G0 1 Series
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Debug support (DBG) RM0444
1370/1390 RM0444 Rev 5
40.5.6 SW-AP registers
Access to these registers are initiated when APnDP=1
There are many AP Registers addressed as the combination of:
The shifted value A[3:2]
The current value of the DP SELECT register.
01 Read/Write 0 DP-CTRL/STAT
Purpose is to:
request a system or debug power-up
configure the transfer operation for AP
accesses
control the pushed compare and pushed
verify operations.
read some status flags (overrun, power-up
acknowledges)
01 Read/Write 1
WIRE
CONTROL
Purpose is to configure the physical serial
port protocol (like the duration of the
turnaround time)
10 Read
READ
RESEND
Enables recovery of the read data from a
corrupted debugger transfer, without
repeating the original AP transfer.
10 Write SELECT
The purpose is to select the current access
port and the active 4-words register window
11 Read/Write READ BUFFER
This read buffer is useful because AP
accesses are posted (the result of a read AP
request is available on the next AP
transaction).
This read buffer captures data from the AP,
presented as the result of a previous read,
without initiating a new transaction
Table 251. SW-DP registers (continued)
A[3:2] R/W
CTRLSEL bit
of SELECT
register
Register Notes
Table 252. 32-bit debug port registers addressed through the shifted value A[3:2]
Address A[3:2] value Description
0x0 00 Reserved, must be kept at reset value.
0x4 01
DP CTRL/STAT register. Used to:
Request a system or debug power-up
Configure the transfer operation for AP accesses
Control the pushed compare and pushed verify operations.
Read some status flags (overrun, power-up acknowledges)

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