RM0444 Rev 5 1083/1390
RM0444 Universal synchonous receiver transmitter (USART)
1138
33.8.14 USART prescaler register (USART_PRESC)
This register can only be written when the USART is disabled (UE=0).
Address offset: 0x2C
Reset value: 0x0000 0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
1514131211109876543210
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. PRESCALER[3:0]
rw rw rw rw
Bits 31:4 Reserved, must be kept at reset value.
Bits 3:0 PRESCALER[3:0]: Clock prescaler
The USART input clock can be divided by a prescaler factor:
0000: input clock not divided
0001: input clock divided by 2
0010: input clock divided by 4
0011: input clock divided by 6
0100: input clock divided by 8
0101: input clock divided by 10
0110: input clock divided by 12
0111: input clock divided by 16
1000: input clock divided by 32
1001: input clock divided by 64
1010: input clock divided by 128
1011: input clock divided by 256
Remaining combinations: Reserved
Note: When PRESCALER is programmed with a value different of the allowed ones,
programmed prescaler value is 1011 i.e. input clock divided by 256.
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