ST STM32G0 1 Series - Table 42. Port Bit Configuration Table; Figure 17. Basic Structure of an I;O Port Bit

RM0444 Rev 5 233/1390
RM0444 General-purpose I/Os (GPIO)
247
Figure 17 shows the basic structures of a standard I/O port bit. Table 42 gives the possible
port bit configurations.
Figure 17. Basic structure of an I/O port bit
MSv33182V2
Output
control
Output data register
Bit set/reset registers
Input data register
Read
To/from on-chip
peripherals,
power control
and EXTI
Analog input/output
P-MOS
Output driver
V
DDIOx
V
SS
N-MOS
Push-pull,
open-drain
or disabled
V
SS
V
DDIOx
on/off
on/off
I/O pin
TTL Schmitt trigger
On/off
Write
Read/write
Pull
up
Pull
down
Input driver
Digital input
Alternate function
output
From on-chip
peripheral
Table 42. Port bit configuration table
(1)
MODE(i)
[1:0]
OTYPE(i)
OSPEED(i)
[1:0]
PUPD(i)
[1:0]
I/O configuration
01
0
SPEED
[1:0]
0 0 GP output PP
0 0 1 GP output PP + PU
0 1 0 GP output PP + PD
0 1 1 Reserved
1 0 0 GP output OD
1 0 1 GP output OD + PU
1 1 0 GP output OD + PD
1 1 1 Reserved (GP output OD)
10
0
SPEED
[1:0]
0 0 AF PP
001AFPP + PU
010AFPP + PD
0 1 1 Reserved
100AFOD
101AFOD + PU
110AFOD + PD
1 1 1 Reserved