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ST STM32G0 1 Series User Manual

ST STM32G0 1 Series
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Embedded Flash memory (FLASH) RM0444
74/1390 RM0444 Rev 5
3.3.6 FLASH program and erase operations
The device-embedded Flash memory can be programmed using in-circuit programming or
in-application programming.
The in-circuit programming (ICP) method is used to update the entire contents of the
Flash memory, using SWD protocol or the supported interfaces by the system boot loader,
to load the user application for the CPU, into the microcontroller. ICP offers quick and
efficient design iterations and eliminates unnecessary package handling or socketing of
devices.
In contrast to the ICP method, in-application programming (IAP) can use any
communication interface supported by the microcontroller (I/Os, UART, I
2
C, SPI, etc.) to
download programming data into memory. IAP allows the user to re-program the Flash
memory while the application is running. Nevertheless, part of the application has to have
been previously programmed in the Flash memory using ICP.
The success of a data word programming operation and a page/bank erase operation is not
guaranteed if aborted due to device reset or power loss.
During a program/erase operation to the Flash memory, any attempt to read the Flash
memory stalls the bus. The read operation proceeds correctly once the program/erase
operation has completed.
Unlocking the Flash memory
After reset, write into the FLASH control register (FLASH_CR) is not allowed so as to
protect the Flash memory against possible unwanted operations due, for example, to
electric disturbances. The following sequence unlocks these registers:
1. Write KEY1 = 0x4567 0123 in the FLASH key register (FLASH_KEYR)
2. Write KEY2 = 0xCDEF 89AB in the FLASH key register (FLASH_KEYR).
Any wrong sequence locks the FLASH_CR registers until the next system reset. In the case
of a wrong key sequence, a bus error is detected and a Hard Fault interrupt is generated.
The FLASH_CR registers can be locked again by software by setting the LOCK bit in one of
these registers.
Note: The FLASH_CR register cannot be written when the BSY1 bit of the FLASH status register
(FLASH_SR) is set. Any attempt to write to this register with the BSY1 bit set causes the
AHB bus to stall until the BSY1 bit is cleared.
3.3.7 FLASH Main memory erase sequences
The Flash memory erase operation can be performed at page level (page erase), or on the
whole memory (mass erase). Mass erase does not affect the Information block (system
Flash memory, OTP and option bytes).
Flash memory page erase
When a page is protected by PCROP or WRP, it is not erased and the WRPERR bit is set.

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ST STM32G0 1 Series Specifications

General IconGeneral
BrandST
ModelSTM32G0 1 Series
CategoryMicrocontrollers
LanguageEnglish

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