Power control (PWR) RM0444
128/1390 RM0444 Rev 5
Table 25. Low-power mode summary
Mode name Entry
Wakeup
source
(1)
Wakeup
system clock
Effect on clocks
Voltage
regulators
MR LPR
Sleep
(Sleep-now or
Sleep-on-exit)
WFI or Return
from ISR
Any interrupt
Same as before
entering Sleep
mode
CPU clock OFF
no effect on other clocks
or analog clock sources
ON
ON
WFE Wakeup event
Low-power
run
Set LPR bit Clear LPR bit No change None
OFF
Low-power
sleep
Set LPR bit +
WFI or Return
from ISR
Any interrupt
Same as before
entering Low-
power sleep
mode
CPU clock OFF
no effect on other clocks
or analog clock sources
Set LPR bit +
WFE
Wakeup event
Stop 0
LPMS=”000” +
SLEEPDEEP bit
+ WFI or Return
from ISR or WFE
Any EXTI line
(configured in the
EXTI registers)
Specific
peripherals
events
HSISYS
All clocks OFF except
LSI and LSE
ON
Stop 1
LPMS=”001” +
SLEEPDEEP bit
+ WFI or Return
from ISR or WFE
OFF
Standby with
SRAM
LPMS=”011”+
Set RRS bit +
SLEEPDEEP bit
+ WFI or Return
from ISR or WFE
WKUP pin edge,
RTC event, TAMP
event, external
reset on NRST
pin, IWDG reset
Standby
LPMS=”011” +
Clear RRS bit +
SLEEPDEEP bit
+ WFI or Return
from ISR or WFE
OFF
Shutdown
LPMS=”1--” +
SLEEPDEEP bit
+ WFI or Return
from ISR or WFE
WKUP pin edge,
RTC event, TAMP
event, external
reset on NRST
pin
All clocks OFF except
LSE
1. Refer to Table 26: Functionalities depending on the working mode.