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ST STM32G0 1 Series User Manual

ST STM32G0 1 Series
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RM0444 Rev 5 1279/1390
RM0444 Universal serial bus full-speed host/device interface (USB)
1307
37.5.6 Isochronous transfers in Host mode
From the host point of view isochronous packets are issued or requested one by frame by
the host frame scheduler. There is no NAK/ACK protocol and no resend of data or token.
The mechanism is based on a table very similar to that for Device mode. See Table 221
below to understand the relationship between the DTOG bit buffers and the buffer usage.
The isochronous behavior for an endpoint is selected by setting the UTYPE bits at 10 in its
USB_CHEPnR register; since there is no handshake phase the only legal values for the
STATRX/STATTX bit pairs are 00 (DISABLED) and 11 (VALID),
Just as in Device mode, the mechanism allows automatic toggle of the DTOG bit. Note that
in Host mode, at the same time as this toggle, the STATTX or STATRX of the completed
buffer is automatically set to DISABLED, permitting the future buffer to be accessed before
re-enabling it by setting it to 11 (VALID).
37.5.7 Suspend/resume events
The USB standard defines a special peripheral state, called SUSPEND, in which the
average current drawn from the USB bus must not be greater than 2.5 mA. This
requirement is of fundamental importance for bus-powered devices, while self-powered
devices are not required to comply to this strict power consumption constraint. In suspend
mode, the host PC sends the notification by not sending any traffic on the USB bus for more
than 3 ms: since a SOF packet must be sent every 1 ms during normal operations, the USB
peripheral detects the lack of 3 consecutive SOF packets as a suspend request from the
host PC and set the SUSP bit to 1 in USB_ISTR register, causing an interrupt if enabled.
Once the device is suspended, its normal operation can be restored by a so called
RESUME sequence, which can be started from the host PC or directly from the peripheral
itself, but it is always terminated by the host PC. The suspended USB peripheral must be
anyway able to detect a RESET sequence, reacting to this event as a normal USB reset
event.
Table 221. Isochronous memory buffers usage
Endpoint
Type
DTOG bit
value
Packet buffer used by the
USB peripheral
Packet buffer used by the
application software
Transmit
(OUT)
0
USB_CHEP_TXRXBD_0
(ADDRn_TX_0 / COUNTn_TX_0)
Buffer description table locations.
USB_CHEP_RXTXBD_0
(ADDRn_TX_1 / COUNTn_TX_1)
Buffer description table locations
1
USB_CHEP_RXTXBD_0
(ADDRn_TX_0 / COUNTn_TX_0)
Buffer description table locations
USB_CHEP_TXRXBD_0
(ADDRn_TX_0 / COUNTn_TX_0)
Buffer description table locations.
Receive
(IN)
0
USB_CHEP_RXTXBD_0
(ADDRn_RX_0 / COUNTn_RX_0)
Buffer description table locations.
USB_CHEP_TXRXBD_0
(ADDRn_RX_0 / COUNTn_RX_0)
Buffer description table locations.
1
USB_CHEP_TXRXBD_0
(ADDRn_RX_0 / COUNTn_RX_0)
Buffer description table locations
USB_CHEP_RXTXBD_0
(ADDRn_RX_0 / COUNTn_RX_0)
Buffer description table locations.

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ST STM32G0 1 Series Specifications

General IconGeneral
BrandST
ModelSTM32G0 1 Series
CategoryMicrocontrollers
LanguageEnglish

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