Independent watchdog (IWDG) RM0444
858/1390 RM0444 Rev 5
28 Independent watchdog (IWDG)
28.1 Introduction
The devices feature an embedded watchdog peripheral that offers a combination of high
safety level, timing accuracy and flexibility of use. The Independent watchdog peripheral
detects and solves malfunctions due to software failure, and triggers system reset when the
counter reaches a given timeout value.
The independent watchdog (IWDG) is clocked by its own dedicated low-speed clock (LSI)
and thus stays active even if the main clock fails.
The IWDG is best suited for applications that require the watchdog to run as a totally
independent process outside the main application, but have lower timing accuracy
constraints. For further information on the window watchdog, refer to Section 29 on page
867.
28.2 IWDG main features
• Free-running downcounter
• Clocked from an independent RC oscillator (can operate in Standby and Stop modes)
• Conditional reset
– Reset (if watchdog activated) when the downcounter value becomes lower than
0x000
– Reset (if watchdog activated) if the downcounter is reloaded outside the window
28.3 IWDG functional description
28.3.1 IWDG block diagram
Figure 278 shows the functional blocks of the independent watchdog module.
Figure 278. Independent watchdog block diagram
1. The register interface is located in the V
DD
voltage domain. The watchdog function is located in the V
DD
voltage domain, still functional in Stop and Standby modes.
MSv37838V1
IWDG reset
LSI
(32 kHz)
V
DD
V
DD
voltage domain
Prescaler register
IWDG_PR
Status register
IWDG_SR
Reload register
IWDG_RLR
Key register
IWDG_KR
12-bit reload value
12-bit downcounter
8-bit
prescaler
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