ST STM32G0 1 Series - TIM14 Prescaler (TIM14_PSC); TIM14 Auto-Reload Register (TIM14_ARR); TIM14 Capture;Compare Register 1 (TIM14_CCR1)

General-purpose timers (TIM14) RM0444
738/1390 RM0444 Rev 5
24.4.9 TIM14 prescaler (TIM14_PSC)
Address offset: 0x28
Reset value: 0x0000
24.4.10 TIM14 auto-reload register (TIM14_ARR)
Address offset: 0x2C
Reset value: 0xFFFF
24.4.11 TIM14 capture/compare register 1 (TIM14_CCR1)
Address offset: 0x34
Reset value: 0x0000
1514131211109876543210
PSC[15:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 15:0 PSC[15:0]: Prescaler value
The counter clock frequency CK_CNT is equal to f
CK_PSC
/ (PSC[15:0] + 1).
PSC contains the value to be loaded in the active prescaler register at each update event.
(including when the counter is cleared through UG bit of TIMx_EGR register or through trigger
controller when configured in “reset mode”).
1514131211109876543210
ARR[15:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 15:0 ARR[15:0]: Auto-reload value
ARR is the value to be loaded in the actual auto-reload register.
Refer to Section 24.3.1: Time-base unit on page 717 for more details about ARR update and
behavior.
The counter is blocked while the auto-reload value is null.
1514131211109876543210
CCR1[15:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw