Debug support (DBG) RM0444
1378/1390 RM0444 Rev 5
.
Refer to Section 2.2 on page 58 for the register boundary addresses.
Table 255. DBG register map and reset values
Offset Register
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0x00
DBG_
IDCODE
REV_ID
Res.
Res.
Res.
Res.
DEV_ID
Reset value
(1)
XXXXXXXXXXXXXXXX011 0XXXXXXXXXXXX
0x04
DBG_CR
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
DBG_STANDBY
DBG_STOP
Res.
Reset value 00
0x08
DBG_
APB_FZ1
DBG_LPTIM1_STOP
DBG_LPTIM2_STOP
Res.
Res.
Res.
Res.
Res.
Res.
Res.
DBG_I2C2_SMBUS_TIMEOUT
DBG_I2C1_SMBUS_TIMEOUT
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
DBG_IWDG_STOP
DBG_WWDG_STOP
DBG_RTC_STOP
Res.
Res.
Res.
Res.
DBG_TIM7_STOP
DBG_TIM6_STOP
Res.
DBG_TIM4_STOP
DBG_TIM3_STOP
DBG_TIM2_STOP
Reset value 00 00 000 00 000
0x0C
DBG_
APB_FZ2
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
DBG_TIM17_STOP
DBG_TIM16_STOP
DBG_TIM15_STOP
DBG_TIM14_STOP
Res.
Res.
Res.
DBG_TIM1_STOP
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Reset value 0 0 0 0 0
1. The reset value is product dependent. For more information, refer to Section 40.10.1: DBG device ID code register
(DBG_IDCODE).
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