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ST STM32G0 1 Series User Manual

ST STM32G0 1 Series
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RM0444 Rev 5 91/1390
RM0444 Embedded Flash memory (FLASH)
118
If the word and its complement are matching, the option word/byte is copied into the option
register.
If the comparison between the word and its complement fails, a status bit OPTVERR is set.
Mismatch values are forced into the option registers:
For USR OPT option, the value of mismatch is 1 for all option bits, except the
BOR_EN bit that is 0 (BOR disabled).
For WRP option, the value of mismatch is the default value “No protection”.
For RDP option, the value of mismatch is the default value “Level 1”.
For PCROP, the value of mismatch is “all memory protected”.
For BOOT_LOCK, the value of mismatch is “boot forced from Main Flash
memory”.
Upon system reset, the option bytes are copied into the following option registers that can
be read and written by software:
FLASH_OPTR
FLASH_PCROPyxSR (x = A or B, y = 1 or 2)
FLASH_PCROPyxER (x = A or B, y = 1 or 2)
FLASH_WRPyxR (x = A or B, y = 1 or 2)
FLASH_SECR
These registers are also used to modify options. If these registers are not modified by user,
they reflect the options states of the system. See Modifying user options for more details.
3.5 FLASH memory protection
The Main Flash memory can be protected against external accesses with the read
protection (RDP). The pages can also be protected against unwanted write (WRP) due to
loss of program counter context. The write-protection WRP granularity is 2 Kbytes. Apart
from the RDP and WRP, the Flash memory can also be protected against read and write by
third party (PCROP). The PCROP granularity (subpage size) is 512 bytes.
3.5.1 FLASH read protection (RDP)
The read protection is activated by setting the RDP option byte and then, by applying a
system reset to reload the new RDP option byte. The read protection protects the Main
Flash memory, the option bytes, the backup registers (TAMP_BKPxR in TAMP) and the
SRAM.
Note: If the read protection is set while the debugger is still connected through SWD, apply power
reset instead of system reset.
There are three levels of read protection from no protection (Level 0) to maximum protection
or no debug (Level 2).
The Flash memory is protected when the RDP option byte and its complement contain the
pair of values shown in Table 17.

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ST STM32G0 1 Series Specifications

General IconGeneral
BrandST
ModelSTM32G0 1 Series
CategoryMicrocontrollers
LanguageEnglish

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