Extended interrupt and event controller (EXTI) RM0444
324/1390 RM0444 Rev 5
13.5 EXTI registers
The EXTI register map is divided in the following sections:
All the registers can be accessed with word (32-bit), half-word (16-bit) and byte (8-bit)
access.
13.5.1 EXTI rising trigger selection register (EXTI_RTSR1)
Address offset: 0x000
Reset value: 0x0000 0000
Contains only register bits for configurable events.
Table 64. EXTI register map sections
Address Description
0x000 - 0x01C General configurable event [31:0] configuration
0x060 - 0x06C EXTI I/O port multiplexer
0x080 - 0x0BC CPU input event configuration
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. RT20 Res. RT18 RT17 RT16
rw rw rw rw
1514131211109 8765432 1 0
RT15 RT14 RT13 RT12 RT11 RT10 RT9 RT8 RT7 RT6 RT5 RT4 RT3 RT2 RT1 RT0
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:21 Reserved, must be kept at reset value.
Bit 20 RT20: Rising trigger event configuration bit of configurable line 20
(1)
This bit enables/disables the rising edge trigger for the event and interrupt on the
corresponding line.
0: Disable
1: Enable
The RT20 bit is only available in STM32G0B1xx and STM32G0C1xx. It is reserved in all the
other devices.
Bit 19 Reserved, must be kept at reset value.
Bits 18:0 RTx: Rising trigger event configuration bit of configurable line x (x=18to0)
(2)
Each bit enables/disables the rising edge trigger for the event and interrupt on the
corresponding line.
0: Disable
1: Enable
The RT18 and RT17 bits are only available in STM32G071xx and STM32G081xx as well as
STM32G0B1xx and STM32G0C1xx. They are reserved in STM32G031xx and
STM32G041xx as well as STM32G051xx and STM32G061xx.
1. The configurable lines are edge triggered, no glitch must be generated on these inputs.
If a rising edge on the configurable line occurs during writing of the register, the associated pending bit is not set.
Rising edge trigger can be set for a line with falling edge trigger enabled. In this case, both edges generate a trigger.
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