Tamper and backup registers (TAMP) RM0444
912/1390 RM0444 Rev 5
31 Tamper and backup registers (TAMP)
31.1 Introduction
5 32-bit backup registers are retained in all low-power modes and also in V
BAT
mode. They
can be used to store sensitive data as their content is protected by an tamper detection
circuit. Up to 3 tamper pins and 4 internal tampers are available for anti-tamper detection.
The external tamper pins can be configured for edge detection, or level detection with or
without filtering.
31.2 TAMP main features
• 5 backup registers:
– the backup registers (TAMP_BKPxR) are implemented in the RTC domain that
remains powered-on by V
BAT
when the V
DD
power is switched off.
• Up to 3 external tamper detection events.
– External passive tampers with configurable filter and internal pull-up.
• 4 internal tamper events.
• Any tamper detection can generate a RTC timestamp event.
• Any tamper detection can erase the backup registers.
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