RM0444 Rev 5 111/1390
RM0444 Embedded Flash memory (FLASH)
118
3.7.11 FLASH WRP area A address register (FLASH_WRP1AR)
Address offset: 0x02C
Reset value: 0x00XX 00XX (The option bits are loaded with values from Flash memory at
power-on reset release.)
Access: no wait state when no Flash memory operation is on going, word, half-word and
byte access.
Bit 31 PCROP_RDP: PCROP area erase upon RDP level regression
This bit determines whether the PCROP area (and the totality of the PCROP area boundary
pages) is erased by the mass erase triggered by the RDP level regression from Level 1 to
Level 0:
0: Not erased
1: Erased
The software can only set this bit. It is automatically reset upon mass erase following the
RDP regression from Level 1 to Level 0.
Bits 30:9 Reserved, must be kept cleared
Bits 8:0 PCROP1A_END[8:0]: PCROP1A area end offset (Bank 1)
Contains the offset of the last subpage of the PCROP1A area (in Bank 1 for dual-bank
devices).
(1)
1. The number of effective bits depends on the size of Flash memory in the device.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. WRP1A_END[6:0]
rw rw rw rw rw rw rw
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Res. Res. Res. Res. Res. Res. Res. Res. Res. WRP1A_STRT[6:0]
rw rw rw rw rw rw rw
Bits 31:23 Reserved, must be kept at reset value.
Bits 22:16 WRP1A_END[6:0]: WRP area A end offset (Bank 1)
This bitfield contains the offset of the last page of the WRP area A (in Bank 1 for dual-bank
devices).
(1)
Bits 15:6 Reserved, must be kept at reset value.
Bits 6:0 WRP1A_STRT[6:0]: WRP area A start offset (Bank 1)
This bitfield contains the offset of the first page of the WRP area A (in Bank 1 for dual-bank
devices).
(1)
1. The number of effective bits depends on the size of Flash memory in the device.
To Next Page
Loading...
Need help?
General
