General-purpose timers (TIM15/TIM16/TIM17) RM0444
802/1390 RM0444 Rev 5
25.5.19 TIM15 alternate register 1 (TIM15_AF1)
Address offset: 0x60
Reset value: 0x0000 0001
Bits 15:0 DMAB[15:0]: DMA register for burst accesses
A read or write operation to the DMAR register accesses the register located at the address
(TIMx_CR1 address) + (DBA + DMA index) x 4
where TIMx_CR1 address is the address of the control register 1, DBA is the DMA base
address configured in TIMx_DCR register, DMA index is automatically controlled by the
DMA transfer, and ranges from 0 to DBL (DBL configured in TIMx_DCR).
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
1514131211109876543210
Res. Res. Res.
BKCM
P3P
BKCM
P2P
BKCM
P1P
BKINP Res. Res. Res. Res. Res.
BKCM
P3E
BKCM
P2E
BKCM
P1E
BKINE
rw rw rw rw rw rw rw rw
Bits 31:13 Reserved, must be kept at reset value.
Bit 12 BKCMP3P: BRK COMP3 input polarity
This bit selects the COMP3 input sensitivity. It must be programmed together with the BKP
polarity bit.
0: COMP3 input is active low
1: COMP3 input is active high
Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits
in TIMx_BDTR register).
Bit 11 BKCMP2P: BRK COMP2 input polarity
This bit selects the COMP2 input sensitivity. It must be programmed together with the BKP
polarity bit.
0: COMP2 input is active low
1: COMP2 input is active high
Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits
in TIMx_BDTR register).
Bit 10 BKCMP1P: BRK COMP1 input polarity
This bit selects the COMP1 input sensitivity. It must be programmed together with the BKP
polarity bit.
0: COMP1 input is active low
1: COMP1 input is active high
Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits
in TIMx_BDTR register).
Bit 9 BKINP: BRK BKIN input polarity
This bit selects the BKIN alternate function input sensitivity. It must be programmed together
with the BKP polarity bit.
0: BKIN input is active low
1: BKIN input is active high
Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits
in TIMx_BDTR register).
To Next Page
Loading...
Need help?
General
