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ST STM32G0 1 Series User Manual

ST STM32G0 1 Series
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USB Type-C™ / USB Power Delivery interface (UCPD) RM0444
1336/1390 RM0444 Rev 5
38.7.6 UCPD status register (UCPD_SR)
Address offset: 0x014
Reset value: 0x0000 0000
The flags (single-bit status bitfields) are associated with interrupt request. Interrupt is
generated if enabled by the corresponding bit of the UCPD_IMR register.
Bit 6 TXUNDIE: TXUND interrupt enable
0: Disable
1: Enable
Bit 5 HRSTSENTIE: HRSTSENT interrupt enable
0: Disable
1: Enable
Bit 4 HRSTDISCIE: HRSTDISC interrupt enable
0: Disable
1: Enable
Bit 3 TXMSGABTIE: TXMSGABT interrupt enable
0: Disable
1: Enable
Bit 2 TXMSGSENTIE: TXMSGSENT interrupt enable
0: Disable
1: Enable
Bit 1 TXMSGDISCIE: TXMSGDISC interrupt enable
0: Disable
1: Enable
Bit 0 TXISIE: TXIS interrupt enable
0: Disable
1: Enable
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
FRSEVT
TYPEC_VSTATE_CC2[1:0]
TYPEC_VSTATE_CC1[1:0]
rrrrr
1514131211109876543210
TYPECEVT2
TYPECEVT1
RXERR
RXMSGEND
RXOVR
RXHRSTDET
RXORDDET
RXNE Res.
TXUND
HRSTSENT
HRSTDISC
TXMSGABT
TXMSGSENT
TXMSGDISC
TXIS
rrrrrrrr rrrrrrr

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ST STM32G0 1 Series Specifications

General IconGeneral
BrandST
ModelSTM32G0 1 Series
CategoryMicrocontrollers
LanguageEnglish

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