RM0444 Rev 5 221/1390
RM0444 Clock recovery system (CRS)
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6 Clock recovery system (CRS)
This section applies to STM32G0B1 and STM32G0C1 devices only.
6.1 Introduction
The clock recovery system (CRS) is an advanced digital controller acting on the internal
fine-granularity trimmable RC oscillator HSI48. The CRS provides powerful means for
oscillator output frequency evaluation, based on comparison with a selectable
synchronization signal. It is capable of doing automatic adjustment of oscillator trimming
based on the measured frequency error value, while keeping the possibility of a manual
trimming.
The CRS is ideally suited to provide a precise clock to the USB peripheral. In such case, the
synchronization signal can be derived from the start-of-frame (SOF) packet signalization on
the USB bus, which is sent by a USB host at 1 ms intervals.
The synchronization signal can also be derived from the LSE oscillator output or it can be
generated by user software.
6.2 CRS main features
• Selectable synchronization source with programmable prescaler and polarity:
– External pin
– LSE oscillator output
– USB SOF packet reception
• Possibility to generate synchronization pulses by software
• Automatic oscillator trimming capability with no need of CPU action
• Manual control option for faster start-up convergence
• 16-bit frequency error counter with automatic error value capture and reload
• Programmable limit for automatic frequency error value evaluation and status reporting
• Maskable interrupts/events:
– Expected synchronization (ESYNC)
– Synchronization OK (SYNCOK)
– Synchronization warning (SYNCWARN)
– Synchronization or trimming error (ERR)
6.3 CRS implementation
Table 37. CRS features
Feature CRS1
TRIM width 7 bits
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