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ST STM32G0 1 Series - Table 6. Stm32 G0 X1 Peripheral Register Boundary Addresses

ST STM32G0 1 Series
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RM0444 Rev 5 63/1391
RM0444
68
The following table gives the boundary addresses of the peripherals.
Table 6. STM32G0x1 peripheral register boundary addresses
Bus Boundary address Size Peripheral Peripheral register map
- 0xE000 0000 - 0xE00F FFFF 1MB
Cortex
®
-M0+ internal
peripherals
-
IOPORT
0x5000 1800 - 0x5FFF FFFF ~256 MB Reserved -
0x5000 1400 - 0x5000 17FF 1 KB GPIOF Section 7.4.12 on page 248
0x5000 1000 - 0x5000 13FF 1 KB GPIOE Section 7.4.12 on page 248
0x5000 0C00 - 0x5000 0FFF 1 KB GPIOD Section 7.4.12 on page 248
0x5000 0800 - 0x5000 0BFF 1 KB GPIOC Section 7.4.12 on page 248
0x5000 0400 - 0x5000 07FF 1 KB GPIOB Section 7.4.12 on page 248
0x5000 0000 - 0x5000 03FF 1 KB GPIOA Section 7.4.12 on page 248
AHB
0x4002 6400 - 0x4FFF FFFF ~256 MB Reserved -
0x4002 6000 - 0x4002 63FF 1 KB AES Section 20.7.18 on page 522
0x4002 5400 - 0x4002 5FFF 3KB Reserved -
0x4002 5000 - 0x4002 53FF 1 KB RNG Section 19.7.4 on page 473
0x4002 3400 - 0x4002 4FFF 3KB Reserved -
0x4002 3000 - 0x4002 33FF 1 KB CRC Section 14.4.6 on page 343
0x4002 2400 - 0x4002 2FFF 3KB Reserved -
0x4002 2000 - 0x4002 23FF 1 KB FLASH Section 3.7.22 on page 118
0x4002 1C00 - 0x4002 1FFF 3KB Reserved -
0x4002 1800 - 0x4002 1BFF 1 KB EXTI Section 13.5.16 on page 335
0x4002 1400 - 0x4002 17FF 1KB Reserved -
0x4002 1000 - 0x4002 13FF 1 KB RCC Section 5.4.25 on page 218
0x4002 0C00 - 0x4002 0FFF 1KB Reserved -
0x4002 0800 - 0x4002 0BFF 2 KB DMAMUX Section 11.6.7 on page 313
0x4002 0400 - 0x4002 07FF 1 KB DMA2 Section 10.6.7 on page 296
0x4002 0000 - 0x4002 03FF 1 KB DMA1 Section 10.6.7 on page 296
APB
0x4001 5C00 - 0x4001 FFFF 32 KB Reserved -
0x4001 5800 - 0x4001 5BFF 1 KB DBG Section 40.10.5 on page 1378
0x4001 4C00 - 0x4001 57FF 3KB Reserved -
0x4001 4800 - 0x4001 4BFF 1 KB TIM17 Section 25.6.21 on page 830
0x4001 4400 - 0x4001 47FF 1 KB TIM16 Section 25.6.21 on page 830

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