RM0444 Rev 5 319/1390
RM0444 Extended interrupt and event controller (EXTI)
335
13.2.1 EXTI connections between peripherals and CPU
The peripherals able to generate wakeup or interrupt events when the system is in Stop
mode are connected to the EXTI.
• Peripheral wakeup signals that generate a pulse or that do not have an interrupt status
bits in the peripheral, are connect to an EXTI configurable line. For these events the
EXTI provides a status pending bit which requires to be cleared. It is the EXTI interrupt
associated with the status bit that interrupts the CPU.
• Peripheral interrupt and wakeup signals that have a status bit in the peripheral which
requires to be cleared in the peripheral, are connected to an EXTI direct line. There is
no status pending bit within the EXTI. The interrupt or wakeup is cleared by the CPU in
the peripheral. It is the peripheral interrupt that interrupts the CPU directly.
• All GPIO ports input to the EXTI multiplexer, allowing to select a port to wake up the
system via a configurable event.
The EXTI configurable event interrupts are connected to the NVIC(a) of the CPU.
The dedicated EXTI/EVG CPU event is connected to the CPU rxev input.
The EXTI CPU wakeup signals are connected to the PWR block, and are used to wake up
the system and CPU sub-system bus clocks.
13.3 EXTI functional description
Depending on the EXTI line type and wakeup target(s), different logic implementations are
used. The applicable features and control or status registers are:
• rising and falling edge event enable through
– EXTI rising trigger selection register (EXTI_RTSR1)
– EXTI falling trigger selection register 1 (EXTI_FTSR1)
• software trigger through EXTI software interrupt event register 1 (EXTI_SWIER1)
• pending interrupt flagging through
– EXTI rising edge pending register 1 (EXTI_RPR1)
– EXTI falling edge pending register 1 (EXTI_FPR1)
– EXTI external interrupt selection register (EXTI_EXTICRx)
• CPU wakeup and interrupt enable through
– EXTI CPU wakeup with interrupt mask register (EXTI_IMR1)
– EXTI CPU wakeup with interrupt mask register (EXTI_IMR2)
• CPU wakeup and event enable through
– EXTI CPU wakeup with event mask register (EXTI_EMR1)
– EXTI CPU wakeup with event mask register (EXTI_EMR2)
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