EasyManua.ls Logo

ST STM32G0 1 Series

ST STM32G0 1 Series
1390 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
Direct memory access controller (DMA) RM0444
282/1390 RM0444 Rev 5
Channel configuration procedure
The following sequence is needed to configure a DMA channel x:
1. Set the peripheral register address in the DMA_CPARx register.
The data is moved from/to this address to/from the memory after the peripheral event,
or after the channel is enabled in memory-to-memory mode.
2. Set the memory address in the DMA_CMARx register.
The data is written to/read from the memory after the peripheral event or after the
channel is enabled in memory-to-memory mode.
3. Configure the total number of data to transfer in the DMA_CNDTRx register.
After each data transfer, this value is decremented.
4. Configure the parameters listed below in the DMA_CCRx register:
the channel priority
the data transfer direction
the circular mode
the peripheral and memory incremented mode
the peripheral and memory data size
the interrupt enable at half and/or full transfer and/or transfer error
5. Activate the channel by setting the EN bit in the DMA_CCRx register.
A channel, as soon as enabled, may serve any DMA request from the peripheral connected
to this channel, or may start a memory-to-memory block transfer.
Note: The two last steps of the channel configuration procedure may be merged into a single
access to the DMA_CCRx register, to configure and enable the channel.
Channel state and disabling a channel
A channel x in active state is an enabled channel (read DMA_CCRx.EN = 1). An active
channel x is a channel that must have been enabled by the software (DMA_CCRx.EN set
to 1) and afterwards with no occurred transfer error (DMA_ISR.TEIFx = 0). In case there is a
transfer error, the channel is automatically disabled by hardware (DMA_CCRx.EN = 0).
The three following use cases may happen:
Suspend and resume a channel
This corresponds to the two following actions:
An active channel is disabled by software (writing DMA_CCRx.EN = 0 whereas
DMA_CCRx.EN = 1).
The software enables the channel again (DMA_CCRx.EN set to 1) without
reconfiguring the other channel registers (such as DMA_CNDTRx, DMA_CPARx
and DMA_CMARx).
This case is not supported by the DMA hardware, that does not guarantee that the
remaining data transfers are performed correctly.
Stop and abort a channel
If the application does not need any more the channel, this active channel can be
disabled by software. The channel is stopped and aborted but the DMA_CNDTRx

Table of Contents

Related product manuals