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ST STM32G0 1 Series User Manual

ST STM32G0 1 Series
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RM0444 Rev 5 67/1391
RM0444
68
The boot mode configuration is latched on the 4th rising edge of SYSCLK after a reset. It is
up to the user to set boot mode configuration related to the required boot mode.
The boot mode configuration is also re-sampled when exiting from Standby mode.
Consequently they must be kept in the required Boot mode configuration in Standby mode.
After this startup delay has elapsed, the CPU fetches the top-of-stack value from address
0x0000 0000, then starts code execution from the boot memory at 0x0000 0004.
Depending on the selected boot mode, main Flash memory, system memory or SRAM is
accessible as follows:
Boot from main Flash memory: the main Flash memory is aliased in the boot memory
space (0x0000 0000), but still accessible from its original memory space
(0x0800 0000). In other words, the Flash memory contents can be accessed starting
from address 0x0000 0000 or 0x0800 0000.
Boot from system memory: the system memory is aliased in the boot memory space
(0x0000 0000), but still accessible from its original memory space 0x1FFF0000.
Boot from the embedded SRAM: the SRAM is aliased in the boot memory space
(0x0000 0000), but it is still accessible from its original memory space (0x2000 0000).
Forcing boot from user Flash memory
The BOOT_LOCK bit allows forcing a unique entry point in the main Flash memory for boot,
regardless of the other boot mode configuration bits. See section Forcing boot from Flash
memory.
Empty check
Internal empty check flag (the EMPTY bit of the FLASH access control register
(FLASH_ACR)) is implemented to allow easy programming of virgin devices by the boot
loader. This flag is used when BOOT0 pin is defining Main Flash memory as the target boot
area. When the flag is set, the device is considered as empty and System memory (boot
loader) is selected instead of the Main Flash as a boot area to allow user to program the
Flash memory.
This flag is updated only during Option bytes loading: it is set when the content of the
address 0x0800 0000 is read as 0xFFFF FFFF, otherwise it is cleared. It means a power
reset or setting of OBL_LAUNCH bit in FLASH_CR register is needed to clear this flag after
programming of a virgin device to execute user code after System reset. The EMPTY bit
can also directly be written by software.
0 0 1 0 x Embedded SRAM
0 x x 1 1 Main Flash memory
0 1 x 1 0 System memory
0 0 x 1 0 Embedded SRAM
1 x x x x Main Flash memory forced
Table 8. Boot modes (continued)
Boot mode configuration
Selected boot area
BOOT_
LOCK bit
nBOOT1
bit
BOOT0
pin
nBOOT_SEL
bit
nBOOT0
bit

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ST STM32G0 1 Series Specifications

General IconGeneral
BrandST
ModelSTM32G0 1 Series
CategoryMicrocontrollers
LanguageEnglish

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