EasyManuals Logo

ST STM32L4x6 User Manual

ST STM32L4x6
1693 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #1572 background imageLoading...
Page #1572 background image
USB on-the-go full-speed (OTG_FS) RM0351
1572/1693 DocID024597 Rev 3
Bit 31 EPENA: Endpoint enable
The application sets this bit to start transmitting data on the endpoint 0.
The core clears this bit before setting any of the following interrupts on this endpoint:
Endpoint disabled
Transfer completed
Bit 30 EPDIS: Endpoint disable
The application sets this bit to stop transmitting data on an endpoint, even before the
transfer for that endpoint is complete. The application must wait for the Endpoint disabled
interrupt before treating the endpoint as disabled. The core clears this bit before setting the
Endpoint disabled interrupt. The application must set this bit only if Endpoint enable is
already set for this endpoint.
Bits 29:28 Reserved, must be kept at reset value.
Bit 27 SNAK: Set NAK
A write to this bit sets the NAK bit for the endpoint.
Using this bit, the application can control the transmission of NAK handshakes on an
endpoint. The core can also set this bit for an endpoint after a SETUP packet is received on
that endpoint.
Bit 26 CNAK: Clear NAK
A write to this bit clears the NAK bit for the endpoint.
Bits 25:22 TXFNUM: Tx FIFO number
This value is set to the FIFO number that is assigned to IN endpoint 0.
Bit 21 STALL: STALL handshake
The application can only set this bit, and the core clears it when a SETUP token is received
for this endpoint. If a NAK bit, a Global IN NAK or Global OUT NAK is set along with this bit,
the STALL bit takes priority.
Bit 20 Reserved, must be kept at reset value.
Bits 19:18 EPTYP: Endpoint type
Hardcoded to ‘00’ for control.
Bit 17 NAKSTS: NAK status
Indicates the following:
0: The core is transmitting non-NAK handshakes based on the FIFO status
1: The core is transmitting NAK handshakes on this endpoint.
When this bit is set, either by the application or core, the core stops transmitting data, even
if there are data available in the Tx FIFO. Irrespective of this bit’s setting, the core always
responds to SETUP data packets with an ACK handshake.
Bit 16 Reserved, must be kept at reset value.

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the ST STM32L4x6 and is the answer not in the manual?

ST STM32L4x6 Specifications

General IconGeneral
BrandST
ModelSTM32L4x6
CategoryMicrocontrollers
LanguageEnglish

Related product manuals