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ST STM32L4x6 User Manual

ST STM32L4x6
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Digital filter for sigma delta modulators (DFSDM) RM0351
636/1693 DocID024597 Rev 3
Bit 17 RSWSTART: Software start of a conversion on the regular channel
0: Writing ‘0’ has no effect
1: Writing ‘1’ makes a request to start a conversion on the regular channel and causes RCIP to
become ‘1’. If RCIP=1 already, writing to RSWSTART has no effect. Writing ‘1’ has no effect if
RSYNC=1.
This bit is always read as ‘0’.
Bits 16:15 Reserved, must be kept at reset value.
Bits 14:13 JEXTEN[1:0]: Trigger enable and trigger edge selection for injected conversions
00: Trigger detection is disabled
01: Each rising edge on the selected trigger makes a request to launch an injected conversion
10: Each falling edge on the selected trigger makes a request to launch an injected conversion
11: Both rising edges and falling edges on the selected trigger make requests to launch injected
conversions
This bit can be modified only when DFEN=0 (DFSDMx_CR1).
Bits 12:11 Reserved, must be kept at reset value.
Bits 10:8 JEXTSEL[2:0]: Trigger signal selection for launching injected conversions
0x0-0x7: Trigger inputs selected by the following table.
This bit can be modified only when DFEN=0 (DFSDMx_CR1).
DFSDM0 DFSDM1 DFSDM2 DFSDM3
0x00 DFSDM_INTRG0 DFSDM_INTRG0 DFSDM_INTRG0 DFSDM_INTRG0
0x01 DFSDM_INTRG1 DFSDM_INTRG1 DFSDM_INTRG1 DFSDM_INTRG1
0x02 DFSDM_INTRG2 DFSDM_INTRG2 DFSDM_INTRG2 DFSDM_INTRG2
0x03 DFSDM_INTRG3 DFSDM_INTRG3 DFSDM_INTRG3 DFSDM_INTRG4
0x04 DFSDM_INTRG5 DFSDM_INTRG5 DFSDM_INTRG5 DFSDM_INTRG6
0x05 DFSDM_INTRG7 DFSDM_INTRG7 DFSDM_INTRG8 DFSDM_INTRG8
0x06 DFSDM_EXTRG0 DFSDM_EXTRG0 DFSDM_EXTRG0 DFSDM_EXTRG0
0x07 DFSDM_EXTRG1 DFSDM_EXTRG1 DFSDM_EXTRG1 DFSDM_EXTRG1
Refer to Table 122: DFSDM triggers connection.
Bits 7:6 Reserved, must be kept at reset value.
Bit 5 JDMAEN: DMA channel enabled to read data for the injected channel group
0: The DMA channel is not enabled to read injected data
1: The DMA channel is enabled to read injected data
This bit can be modified only when DFEN=0 (DFSDMx_CR1).
Bit 4 JSCAN: Scanning conversion mode for injected conversions
0: One channel conversion is performed from the injected channel group and next the selected
channel from this group is selected.
1: The series of conversions for the injected group channels is executed, starting over with the
lowest selected channel.
This bit can be modified only when DFEN=0 (DFSDMx_CR1).
Writing JCHG if JSCAN=0 resets the channel selection to the lowest selected channel.
Bit 3 JSYNC: Launch an injected conversion synchronously with the DFSDM0 JSWSTART trigger
0: Do not launch an injected conversion synchronously with DFSDM0
1: Launch an injected conversion in this DFSDM at the very moment when an injected conversion is
launched in DFSDM0 by its JSWSTART trigger
This bit can be modified only when DFEN=0 (DFSDMx_CR1).

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ST STM32L4x6 Specifications

General IconGeneral
BrandST
ModelSTM32L4x6
CategoryMicrocontrollers
LanguageEnglish

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