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NXP Semiconductors K22F series - Page 115

NXP Semiconductors K22F series
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3.8.2.8 FTM Hall sensor support
For 3 phase motor control sensor-ed applications the use of Hall sensors, generally 3
sensors placed 120 degrees apart around the rotor, are deployed to detect position and
speed. Each of the 3 sensors provides a pulse that applied to an input capture pin, can
then be analyzed and both speed and position can be deduced. This device has two 2-
channel FTMs. (FTM1 and FTM2) and thus provides 4 input capture pins. To simplify
the calculations required by the CPU on each hall sensor's input, if all 3 inputs are
"exclusively OR'd " into one timer channel and the free running counter is refreshed on
every edge then this can simplify the speed calculation.
Via the SIM module and SIM_SOPT4 register the FTM2CH1SRC bit provides the choice
of normal FTM2_CH1 input or the XOR of FTM2_CH0, FTM2_CH1 and FTM1_CH1
pins that will be applied to FTM2_CH1.
Note: If the user utilizes FTM1_CH1 to be an input to FTM2_CH1, FTM1_CH0 can still
be utilized for other functions.
X O R
FTM2_CH1
FTM2_CH0
FTM1_CH1
Ch0
Ch1
FTM2
Ch0
Ch1
FTM1
SIM_SOPT4[FTM2CH1SRC]
Figure 3-39. FTM Hall Sensor Configuration
3.8.2.9
FTM modulation implementation
FTM0 and FTM3 support a modulation function where the output channels when
configured as PWM or Output Compare mode modulate another timer output when the
channel signal is asserted. Any of the 8 channels of FTM0 and any of the 8 channels of
FTM3 can be configured to support this modulation function.
The SIM_SOPT8 register has eight control bits (FTM0CHySRC) that allow the user to
select normal PWM/Output Compare mode on the corresponding FTM timer channel or
modulate with FTM1_CH1. The diagram below shows the implementation for FTM0.
FTM3 has similar implementation controlled by SIM_SOPT8[FTM3CHySRC] on each
of its 8 channels with modulation possible via FTM2_CH1. See SIM Block Guide for
further information.
Chapter 3 Chip Configuration
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 115

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