Section number Title Page
17.4.2 VLLS modes................................................................................................................................................ 397
17.4.3 Initialization................................................................................................................................................. 397
Chapter 18
Miscellaneous Control Module (MCM)
18.1 Introduction...................................................................................................................................................................399
18.1.1 Features........................................................................................................................................................ 399
18.2 Memory map/register descriptions............................................................................................................................... 399
18.2.1 Crossbar Switch (AXBS) Slave Configuration (MCM_PLASC)................................................................400
18.2.2 Crossbar Switch (AXBS) Master Configuration (MCM_PLAMC)............................................................ 400
18.2.3 Crossbar Switch (AXBS) Control Register (MCM_PLACR)..................................................................... 401
18.2.4 Interrupt Status and Control Register (MCM_ISCR).................................................................................. 401
18.2.5 Compute Operation Control Register (MCM_CPO)................................................................................... 404
18.3 Functional description...................................................................................................................................................405
18.3.1 Interrupts...................................................................................................................................................... 405
Chapter 19
Crossbar Switch Lite (AXBS-Lite)
19.1 Introduction...................................................................................................................................................................407
19.1.1 Features........................................................................................................................................................ 407
19.2 Memory Map / Register Definition...............................................................................................................................408
19.3 Functional Description..................................................................................................................................................408
19.3.1 General operation.........................................................................................................................................408
19.3.2 Arbitration....................................................................................................................................................409
19.4 Initialization/application information........................................................................................................................... 410
Chapter 20
Peripheral Bridge (AIPS-Lite)
20.1 Introduction...................................................................................................................................................................411
20.1.1 Features........................................................................................................................................................ 411
20.1.2 General operation.........................................................................................................................................411
20.2 Memory map/register definition................................................................................................................................... 412
20.3 Functional description...................................................................................................................................................412
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
14 NXP Semiconductors