Section number Title Page
20.3.1 Access support............................................................................................................................................. 412
Chapter 21
Direct Memory Access Multiplexer (DMAMUX)
21.1 Introduction...................................................................................................................................................................413
21.1.1 Overview......................................................................................................................................................413
21.1.2 Features........................................................................................................................................................ 414
21.1.3 Modes of operation...................................................................................................................................... 414
21.2 External signal description............................................................................................................................................415
21.3 Memory map/register definition................................................................................................................................... 415
21.3.1
Channel Configuration register (DMAMUX_CHCFGn)............................................................................ 416
21.4 Functional description...................................................................................................................................................417
21.4.1 DMA channels with periodic triggering capability......................................................................................417
21.4.2 DMA channels with no triggering capability...............................................................................................419
21.4.3 Always-enabled DMA sources.................................................................................................................... 420
21.5 Initialization/application information........................................................................................................................... 421
21.5.1 Reset.............................................................................................................................................................421
21.5.2 Enabling and configuring sources................................................................................................................421
Chapter 22
Enhanced Direct Memory Access (eDMA)
22.1 Introduction...................................................................................................................................................................425
22.1.1 eDMA system block diagram...................................................................................................................... 425
22.1.2 Block parts................................................................................................................................................... 426
22.1.3 Features........................................................................................................................................................ 427
22.2 Modes of operation....................................................................................................................................................... 428
22.3 Memory map/register definition................................................................................................................................... 429
22.3.1 TCD memory............................................................................................................................................... 429
22.3.2 TCD initialization........................................................................................................................................ 429
22.3.3 TCD structure...............................................................................................................................................429
22.3.4 Reserved memory and bit fields...................................................................................................................430
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 15