Section number Title Page
22.3.5 Control Register (DMA_CR).......................................................................................................................441
22.3.6 Error Status Register (DMA_ES)................................................................................................................ 444
22.3.7 Enable Request Register (DMA_ERQ)....................................................................................................... 446
22.3.8 Enable Error Interrupt Register (DMA_EEI)...............................................................................................448
22.3.9 Clear Enable Error Interrupt Register (DMA_CEEI).................................................................................. 450
22.3.10 Set Enable Error Interrupt Register (DMA_SEEI)...................................................................................... 451
22.3.11 Clear Enable Request Register (DMA_CERQ)...........................................................................................452
22.3.12 Set Enable Request Register (DMA_SERQ)...............................................................................................453
22.3.13 Clear DONE Status Bit Register (DMA_CDNE)........................................................................................454
22.3.14 Set START Bit Register (DMA_SSRT)...................................................................................................... 455
22.3.15 Clear Error Register (DMA_CERR)............................................................................................................456
22.3.16 Clear Interrupt Request Register (DMA_CINT)......................................................................................... 457
22.3.17 Interrupt Request Register (DMA_INT)......................................................................................................458
22.3.18 Error Register (DMA_ERR)........................................................................................................................ 460
22.3.19 Hardware Request Status Register (DMA_HRS)........................................................................................ 463
22.3.20 Enable Asynchronous Request in Stop Register (DMA_EARS).................................................................466
22.3.21
Channel n Priority Register (DMA_DCHPRIn).......................................................................................... 468
22.3.22
TCD Source Address (DMA_TCDn_SADDR)...........................................................................................469
22.3.23
TCD Signed Source Address Offset (DMA_TCDn_SOFF)........................................................................469
22.3.24
TCD Transfer Attributes (DMA_TCDn_ATTR).........................................................................................470
22.3.25
TCD Minor Byte Count (Minor Loop Mapping Disabled) (DMA_TCDn_NBYTES_MLNO)................. 471
22.3.26 TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)
(DMA_TCDn_NBYTES_MLOFFNO).......................................................................................................472
22.3.27 TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)
(DMA_TCDn_NBYTES_MLOFFYES)..................................................................................................... 473
22.3.28
TCD Last Source Address Adjustment (DMA_TCDn_SLAST).................................................................474
22.3.29
TCD Destination Address (DMA_TCDn_DADDR)...................................................................................475
22.3.30
TCD Signed Destination Address Offset (DMA_TCDn_DOFF)................................................................475
22.3.31 TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled)
(DMA_TCDn_CITER_ELINKYES)...........................................................................................................476
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
16 NXP Semiconductors