Table 3-4. Interrupt vector assignments (continued)
Address Vector IRQ
1
NVIC
non-IPR
register
number
2
NVIC
IPR
register
number
3
Source module Source description
0x0000_0070 28 12 0 3 DMA DMA channel 12 transfer complete
0x0000_0074 29 13 0 3 DMA DMA channel 13 transfer complete
0x0000_0078 30 14 0 3 DMA DMA channel 14 transfer complete
0x0000_007C 31 15 0 3 DMA DMA channel 15 transfer complete
0x0000_0080 32 16 0 4 DMA DMA error interrupt channels 0-15
0x0000_0084 33 17 0 4 MCM FPU sources
0x0000_0088 34 18 0 4 Flash memory Command complete
0x0000_008C 35 19 0 4 Flash memory Read collision
0x0000_0090 36 20 0 5 Mode Controller Low-voltage detect, low-voltage warning
0x0000_0094 37 21 0 5 LLWU Low Leakage Wakeup
NOTE:
The LLWU interrupt must not be
masked by the interrupt
controller to avoid a scenario
where the system does not fully
exit stop mode on an LLS
recovery.
0x0000_0098 38 22 0 5 WDOG or EWM Both watchdog modules share this
interrupt.
0x0000_009C 39 23 0 5 RNG Randon Number Generator
0x0000_00A0 40 24 0 6 I
2
C0 —
0x0000_00A4 41 25 0 6 I
2
C1 —
0x0000_00A8 42 26 0 6 SPI0 Single interrupt vector for all sources
0x0000_00AC 43 27 0 6 SPI1 Single interrupt vector for all sources
0x0000_00B0 44 28 0 7 I
2
S0 Transmit
0x0000_00B4 45 29 0 7 I
2
S0 Receive
0x0000_00B8 46 30 0 7 LPUART0 Status and error
0x0000_00BC 47 31 0 7 UART0 Single interrupt vector for UART status
sources
0x0000_00C0 48 32 1 8 UART0 Single interrupt vector for UART error
sources
0x0000_00C4 49 33 1 8 UART1 Single interrupt vector for UART status
sources
0x0000_00C8 50 34 1 8 UART1 Single interrupt vector for UART error
sources
0x0000_00CC 51 35 1 8 UART2 Single interrupt vector for UART status
sources
0x0000_00D0 52 36 1 9 UART2 Single interrupt vector for UART error
sources
0x0000_00D4 53 37 1 9 — —
0x0000_00D8 54 38 1 9 — —
Table continues on the next page...
Core modules
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
62 NXP Semiconductors
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