loading point. If the trigger event was a hardware trigger, then the trigger enable bit
(TRIGn) is cleared according to Hardware trigger. Examples with software and hardware
triggers follow.
system clock
selected loading point
MOD register is updated
write 1 to SWSYNC bit
SWSYNC bit
software trigger event
Figure 39-47. MOD synchronization with (SYNCMODE = 0), (PWMSYNC = 0), (REINIT =
0), and software trigger was used
system clock
selected loading point
MOD register is updated
write 1 to TRIG0 bit
TRIG0 bit
trigger 0 event
Figure 39-48. MOD synchronization with (SYNCMODE = 0), (HWTRIGMODE = 0),
(PWMSYNC = 0), (REINIT = 0), and a hardware trigger was used
If (SYNCMODE = 0), (PWMSYNC = 0), and (REINIT = 1), then this synchronization is
made on the next enabled trigger event. If the trigger event was a software trigger, then
the SWSYNC bit is cleared according to the following example. If the trigger event was a
hardware trigger, then the TRIGn bit is cleared according to Hardware trigger. Examples
with software and hardware triggers follow.
Functional description
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
978 NXP Semiconductors
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