NXP Semiconductors LPC1768 - Page 131

UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 19 December 2013 131 of 841
NXP Semiconductors
UM10360
Chapter 9: LPC176x/5x General Purpose Input/Output (GPIO)
Aside from the 32-bit long and word only accessible FIOxMASK register, every fast GPIO
port can also be controlled via several byte and half-word accessible registers listed in
Table 112
, too. Next to providing the same functions as the FIOxMASK register, these
additional registers allow easier and faster access to the physical port pins.
Table 112. Fast GPIO port Mask byte and half-word accessible register description
Generic
Register
name
Description Register
length (bits)
& access
Reset
value
PORTn Register
Address & Name
FIOxMASK0 Fast GPIO Port x Mask
register 0. Bit 0 in
FIOxMASK0 register
corresponds to pin Px.0 …
bit 7 to pin Px.7.
8 (byte)
R/W
0x0 FIO0MASK0 - 0x2009 C010
FIO1MASK0 - 0x2009 C030
FIO2MASK0 - 0x2009 C050
FIO3MASK0 - 0x2009 C070
FIO4MASK0 - 0x2009 C090
FIOxMASK1 Fast GPIO Port x Mask
register 1. Bit 0 in
FIOxMASK1 register
corresponds to pin Px.8 …
bit 7 to pin Px.15.
8 (byte)
R/W
0x0 FIO0MASK1 - 0x2009 C011
FIO1MASK1 - 0x2009 C031
FIO2MASK1 - 0x2009 C051
FIO3MASK1 - 0x2009 C071
FIO4MASK1 - 0x2009 C091
FIOxMASK2 Fast GPIO Port x Mask
register 2. Bit 0 in
FIOxMASK2 register
corresponds to pin Px.16 …
bit 7 to pin Px.23.
8 (byte)
R/W
0x0 FIO0MASK2 - 0x2009 C012
FIO1MASK2 - 0x2009 C032
FIO2MASK2 - 0x2009 C052
FIO3MASK2 - 0x2009 C072
FIO4MASK2 - 0x2009 C092
FIOxMASK3 Fast GPIO Port x Mask
register 3. Bit 0 in
FIOxMASK3 register
corresponds to pin Px.24 …
bit 7 to pin Px.31.
8 (byte)
R/W
0x0 FIO0MASK3 - 0x2009 C013
FIO1MASK3 - 0x2009 C033
FIO2MASK3 - 0x2009 C053
FIO3MASK3 - 0x2009 C073
FIO4MASK3 - 0x2009 C093
FIOxMASKL Fast GPIO Port x Mask
Lower half-word register.
Bit 0 in FIOxMASKL
register corresponds to pin
Px.0 … bit 15 to pin Px.15.
16
(half-word)
R/W
0x0 FIO0MASKL - 0x2009 C010
FIO1MASKL - 0x2009 C030
FIO2MASKL - 0x2009 C050
FIO3MASKL - 0x2009 C070
FIO4MASKL - 0x2009 C090
FIOxMASKU Fast GPIO Port x Mask
Upper half-word register.
Bit 0 in FIOxMASKU
register corresponds to pin
Px.16 … bit 15 to Px.31.
16
(half-word)
R/W
0x0 FIO0MASKU - 0x2009 C012
FIO1MASKU - 0x2009 C032
FIO2MASKU - 0x2009 C052
FIO3MASKU - 0x2009 C072
FIO4MASKU - 0x2009 C092