UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 19 December 2013 187 of 841
NXP Semiconductors
UM10360
Chapter 10: LPC176x/5x Ethernet
• In the case of a transmission error (LateCollision, ExcessiveCollision, or
ExcessiveDefer) or a multi-fragment frame where the device driver did provide the
initial fragments but did not provide the rest of the fragments (NoDescriptor) or in the
case of a nonfatal overrun, the hardware will set the TxErrorInt bit of the IntStatus
register.
All of the above interrupts can be enabled and disabled by setting or resetting the
corresponding bits in the IntEnable register. Enabling or disabling does not affect the
IntStatus register contents, only the propagation of the interrupt status to the CPU (via the
NVIC).
The interrupts, either of individual frames or of the whole list, are a good means of
communication between the DMA manager and the device driver, triggering the device
driver to inspect the status words of descriptors that have been processed.
Transmit example
Figure 21
illustrates the transmit process in an example transmitting uses a frame header
of 8 bytes and a frame payload of 12 bytes.
After reset the values of the DMA registers will be zero. During initialization the device
driver will allocate the descriptor and status array in memory. In this example, an array of
four descriptors is allocated; the array is 4x2x4 bytes and aligned on a 4 byte address
Fig 21. Transmit example memory and registers
StatusInfo
StatusInfo
StatusInfo
StatusInfo
Packet
0x20081314
TxStatus
0x200811F8
TxDescriptor
0x200810EC
0x200810EC
0x200810F0
0x200810F4
0x200810F8
0x200810FC
0x20081100
0x20081104
0x20081108
0x200811F8
0x200811FC
0x20081200
0x20081204
Packet
0x20081411
Packet
0x20081419
Packet
0x20081324
descriptor array
descriptor 0descriptor 1descriptor 2descriptor 3
descriptor array
fragment buffers
TxProduceIndex
TxConsumeIndex
TxDescriptorNumber
= 3
status 1 status 0statu s 3 status 2
status array
status array
PACKET 1 HEADER (8 bytes)
PACKET 0 PAYLOAD (12 bytes)
PACKET 0 HEADER (8 bytes)
00 7Control
CONTROL
00 7
Control
CONTROL
11 3
Control
CONTROL
00
7
Control
CONTROL
0x20081314
0x2008131B
0x20081411
0x20081419
0x2008141C
0x20081324
0x2008132B
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