UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 20 December 2013 807 of 841
NXP Semiconductors
UM10360
Chapter 35: Supplementary information
Table 174. Power-Down register (PowerDown - address
0x5000 0FF4) bit description . . . . . . . . . . . . .172
Table 175. Receive Descriptor Fields . . . . . . . . . . . . . . .174
Table 176. Receive Descriptor Control Word . . . . . . . . .174
Table 177. Receive Status Fields . . . . . . . . . . . . . . . . . .174
Table 178. Receive Status HashCRC Word . . . . . . . . . .175
Table 179. Receive status information word . . . . . . . . . .175
Table 180. Transmit descriptor fields. . . . . . . . . . . . . . . .177
Table 181. Transmit descriptor control word . . . . . . . . . .177
Table 182. Transmit status fields. . . . . . . . . . . . . . . . . . .177
Table 183. Transmit status information word. . . . . . . . . .178
Table 184. USB related acronyms, abbreviations, and
definitions used in this chapter . . . . . . . . . . . .215
Table 185. Fixed endpoint configuration . . . . . . . . . . . . .216
Table 186. USB external interface. . . . . . . . . . . . . . . . . .219
Table 187. USB device controller clock sources . . . . . . .220
Table 188. USB device register map . . . . . . . . . . . . . . .221
Table 189. USBClkCtrl register (USBClkCtrl - address
0x5000 CFF4) bit description . . . . . . . . . . . .222
Table 190. USB Clock Status register (USBClkSt - address
0x5000 CFF8) bit description . . . . . . . . . . . . .223
Table 191. USB Interrupt Status register (USBIntSt - address
0x5000 C1C0) bit description . . . . . . . . . . . .223
Table 192. USB Device Interrupt Status register
(USBDevIntSt - address 0x5000 C200) bit
allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . .224
Table 193. USB Device Interrupt Status register
(USBDevIntSt - address 0x5000 C200) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .224
Table 194. USB Device Interrupt Enable register
(USBDevIntEn - address 0x5000 C204) bit
allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . .225
Table 195. USB Device Interrupt Enable register
(USBDevIntEn - address 0x5000 C204) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .225
Table 196. USB Device Interrupt Clear register
(USBDevIntClr - address 0x5000 C208) bit
allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . .226
Table 197. USB Device Interrupt Clear register
(USBDevIntClr - address 0x5000 C208) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .226
Table 198. USB Device Interrupt Set register (USBDevIntSet
- address 0x5000 C20C) bit allocation . . . . .226
Table 199. USB Device Interrupt Set register (USBDevIntSet
- address 0x5000 C20C) bit description . . . .226
Table 200. USB Device Interrupt Priority register
(USBDevIntPri - address 0x5000 C22C) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .227
Table 201. USB Endpoint Interrupt Status register
(USBEpIntSt - address 0x5000 C230) bit
allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . .227
Table 202. USB Endpoint Interrupt Status register
(USBEpIntSt - address 0x5000 C230) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .228
Table 203. USB Endpoint Interrupt Enable register
(USBEpIntEn - address 0x5000 C234) bit
allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . .229
Table 204. USB Endpoint Interrupt Enable register
(USBEpIntEn - address 0x5000 C234) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 229
Table 205. USB Endpoint Interrupt Clear register
(USBEpIntClr - address 0x5000 C238) bit
allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 230
Table 206. USB Endpoint Interrupt Clear register
(USBEpIntClr - address 0x5000 C238) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 230
Table 207. USB Endpoint Interrupt Set register
(USBEpIntSet - address 0x5000 C23C) bit
allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 230
Table 208. USB Endpoint Interrupt Set register
(USBEpIntSet - address 0x5000 C23C) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 230
Table 209. USB Endpoint Interrupt Priority register
(USBEpIntPri - address 0x5000 C240) bit
allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 231
Table 210. USB Endpoint Interrupt Priority register
(USBEpIntPri - address 0x5000 C240) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 231
Table 211. USB Realize Endpoint register (USBReEp -
address 0x5000 C244) bit allocation . . . . . . 232
Table 212. USB Realize Endpoint register (USBReEp -
address 0x5000 C244) bit description . . . . . 232
Table 213. USB Endpoint Index register (USBEpIn - address
0x5000 C248) bit description . . . . . . . . . . . . 233
Table 214. USB MaxPacketSize register (USBMaxPSize -
address 0x5000 C24C) bit description . . . . . 233
Table 215. USB Receive Data register (USBRxData -
address 0x5000 C218) bit description . . . . . 234
Table 216. USB Receive Packet Length register
(USBRxPlen - address 0x5000 C220) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 234
Table 217. USB Transmit Data register (USBTxData -
address 0x5000 C21C) bit description . . . . . 235
Table 218. USB Transmit Packet Length register
(USBTxPLen - address 0x5000 C224) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 235
Table 219. USB Control register (USBCtrl - address 0x5000
C228) bit description. . . . . . . . . . . . . . . . . . . 235
Table 220. USB Command Code register (USBCmdCode -
address 0x5000 C210) bit description . . . . . 236
Table 221. USB Command Data register (USBCmdData -
address 0x5000 C214) bit description . . . . . 236
Table 222. USB DMA Request Status register (USBDMARSt
- address 0x5000 C250) bit allocation . . . . . 237
Table 223. USB DMA Request Status register (USBDMARSt
- address 0x5000 C250) bit description . . . . 237
Table 224. USB DMA Request Clear register (USBDMARClr
- address 0x5000 C254) bit description . . . . 237
Table 225. USB DMA Request Set register (USBDMARSet -
address 0x5000 C258) bit description . . . . . 238
Table 226. USB UDCA Head register (USBUDCAH -
address 0x5000 C280) bit description . . . . . 238
Table 227. USB EP DMA Status register (USBEpDMASt -
a
ddress 0x50
00 C284) bit description . . . . . 239
Table 228. USB EP DMA Enable register (USBEpDMAEn -
address 0x5000 C288) bit description . . . . . 239
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