UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 20 December 2013 832 of 841
continued >>
NXP Semiconductors
UM10360
Chapter 35: Supplementary information
23.3 Description. . . . . . . . . . . . . . . . . . . . . . . . . . . 505
23.4 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 505
23.5 Register description . . . . . . . . . . . . . . . . . . . 506
23.5.1 System Timer Control and status register
(STCTRL - 0xE000 E010) . . . . . . . . . . . . . . 506
23.5.2 System Timer Reload value register (STRELOAD
- 0xE000 E014). . . . . . . . . . . . . . . . . . . . . . . 507
23.5.3 System Timer Current value register (STCURR -
0xE000 E018) . . . . . . . . . . . . . . . . . . . . . . . 507
23.5.4 System Timer Calibration value register
(STCALIB - 0xE000 E01C) . . . . . . . . . . . . . 507
23.6 Example timer calculations . . . . . . . . . . . . . 509
Example 1). . . . . . . . . . . . . . . . . . . . . . . . . . . 509
Example 2). . . . . . . . . . . . . . . . . . . . . . . . . . . 509
Example 3). . . . . . . . . . . . . . . . . . . . . . . . . . . 509
Example 4). . . . . . . . . . . . . . . . . . . . . . . . . . . 509
Chapter 24: LPC176x/5x Pulse Width Modulator (PWM)
24.1 Basic configuration . . . . . . . . . . . . . . . . . . . . 510
24.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 510
24.3 Description. . . . . . . . . . . . . . . . . . . . . . . . . . . 511
24.4 Sample waveform with rules for single and
double edge control. . . . . . . . . . . . . . . . . . . . 513
24.4.1 Rules for Single Edge Controlled PWM
Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 514
24.4.2 Rules for Double Edge Controlled PWM
Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 514
24.5 Pin description. . . . . . . . . . . . . . . . . . . . . . . . 514
24.6 Register description . . . . . . . . . . . . . . . . . . . 515
24.6.1 PWM Interrupt Register (PWM1IR - 0x4001
8000) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 516
24.6.2 PWM Timer Control Register (PWM1TCR
0x4001 8004) . . . . . . . . . . . . . . . . . . . . . . . . 517
24.6.3 PWM Count Control Register (PWM1CTCR -
0x4001 8070) . . . . . . . . . . . . . . . . . . . . . . . . 517
24.6.4 PWM Match Control Register (PWM1MCR -
0x4001 8014) . . . . . . . . . . . . . . . . . . . . . . . . 518
24.6.5 PWM Capture Control Register (PWM1CCR -
0x4001 8028) . . . . . . . . . . . . . . . . . . . . . . . . 519
24.6.6 PWM Control Register (PWM1PCR -
0x4001 804C) . . . . . . . . . . . . . . . . . . . . . . . 520
24.6.7 PWM Latch Enable Register (PWM1LER -
0x4001 8050) . . . . . . . . . . . . . . . . . . . . . . . . 521
Chapter 25: LPC176x/5x Motor control PWM
25.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . 523
25.2 Description. . . . . . . . . . . . . . . . . . . . . . . . . . . 523
25.3 Pin description. . . . . . . . . . . . . . . . . . . . . . . . 523
25.4 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . 524
25.5 Configuring other modules for MCPWM use 525
25.6 General Operation . . . . . . . . . . . . . . . . . . . . . 525
25.7 Register description . . . . . . . . . . . . . . . . . . . 526
25.7.1 MCPWM Control register . . . . . . . . . . . . . . . 527
25.7.1.1 MCPWM Control read address (MCCON -
0x400B 8000) . . . . . . . . . . . . . . . . . . . . . . . . 527
25.7.1.2 MCPWM Control set address (MCCON_SET -
0x400B 8004) . . . . . . . . . . . . . . . . . . . . . . . . 528
25.7.1.3 MCPWM Control clear address (MCCON_CLR -
0x400B 8008) . . . . . . . . . . . . . . . . . . . . . . . . 529
25.7.2 MCPWM Capture Control register . . . . . . . . 529
25.7.2.1 MCPWM Capture Control read address
(MCCAPCON - 0x400B 800C) . . . . . . . . . . . 529
25.7.2.2 MCPWM Capture Control set address
(MCCAPCON_SET - 0x400B 8010). . . . . . . 530
25.7.2.3 MCPWM Capture control clear address
(MCCAPCON_CLR - 0x400B 8014). . . . . . . 530
25.7.3 MCPWM Interrupt registers . . . . . . . . . . . . . 530
7.3.1 MCPWM Interrupt Enable read address
(MCINTEN - 0x400B 8050) . . . . . . . . . . . . . 530
25.7.3.2 MCPWM Interrupt Enable set address
(MCINTEN_SET - 0x400B 8054) . . . . . . . . 531
25.7.3.3 MCPWM Interrupt Enable clear address
(MCINTEN_CLR - 0x400B 8058) . . . . . . . . 531
25.7.3.4 MCPWM Interrupt Flags read address (MCINTF -
0x400B 8068) . . . . . . . . . . . . . . . . . . . . . . . 531
25.7.3.5 MCPWM Interrupt Flags set address
(MCINTF_SET - 0x400B 806C) . . . . . . . . . 531
25.7.3.6 MCPWM Interrupt Flags clear address
(MCINTF_CLR - 0x400B 8070) . . . . . . . . . 531
25.7.4 MCPWM Count Control register . . . . . . . . . 532
25.7.4.1 MCPWM Count Control read address
(MCCNTCON - 0x400B 805C). . . . . . . . . . . 532
25.7.4.2 MCPWM Count Control set address
(MCCNTCON_SET - 0x400B 8060) . . . . . . 533
25.7.4.3 MCPWM Count Control clear address
(MCCNTCON_CLR - 0x400B 8064) . . . . . . 533
25.7.5 MCPWM Timer/Counter 0-2 registers (MCTC0-2 -
0x400B 8018, 0x400B 801C, 0x400B 8020) 533
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