ST STM32G0 1 Series - Page 193

RM0444 Rev 5 193/1390
RM0444 Reset and clock control (RCC)
220
Bit 23 I2C3RST: I2C3 reset
(1)
Set and cleared by software.
0: No effect
1: Reset I2C3
Bit 22 I2C2RST: I2C2 reset
Set and cleared by software.
0: No effect
1: Reset I2C2
Bit 21 I2C1RST: I2C1 reset
Set and cleared by software.
0: No effect
1: Reset I2C1
Bit 20 LPUART1RST: LPUART1 reset
Set and cleared by software.
0: No effect
1: Reset LPUART1
Bit 19 USART4RST: USART4 reset
(1)
Set and cleared by software.
0: No effect
1: Reset USART4
Bit 18 USART3RST: USART3 reset
(1)
Set and cleared by software.
0: No effect
1: Reset USART3
Note:
Bit 17 USART2RST: USART2 reset
Set and cleared by software.
0: No effect
1: Reset USART2
Bits 16 CRSRST: CRS reset
(1)
Set and cleared by software.
0: No effect
1: Reset CRS
Bit 15 SPI3RST: SPI3 reset
(1)
Set and cleared by software.
0: No effect
1: Reset SPI3
Bit 14 SPI2RST: SPI2 reset
Set and cleared by software.
0: No effect
1: Reset SPI2
Bit 13 USBRST: USB reset
(1)
Set and cleared by software.
0: No effect
1: Reset USB