ST STM32G0 1 Series - Page 21

RM0444 Rev 5 21/1390
RM0444 Contents
38
22.3.19 Timer synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 663
22.3.20 DMA burst mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 668
22.3.21 Debug mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 669
22.4 TIM2/TIM3/TIM4 registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 670
22.4.1 TIMx control register 1 (TIMx_CR1)(x = 2 to 4) . . . . . . . . . . . . . . . . . . 670
22.4.2 TIMx control register 2 (TIMx_CR2)(x = 2 to 4) . . . . . . . . . . . . . . . . . . 671
22.4.3 TIMx slave mode control register (TIMx_SMCR)(x = 2 to 4) . . . . . . . . 673
22.4.4 TIMx DMA/Interrupt enable register (TIMx_DIER)(x = 2 to 4) . . . . . . . 676
22.4.5 TIMx status register (TIMx_SR)(x = 2 to 4) . . . . . . . . . . . . . . . . . . . . . 677
22.4.6 TIMx event generation register (TIMx_EGR)(x = 2 to 4) . . . . . . . . . . . 679
22.4.7 TIMx capture/compare mode register 1 [alternate] (TIMx_CCMR1)
(x = 2 to 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 680
22.4.8 TIMx capture/compare mode register 1 [alternate] (TIMx_CCMR1)
(x = 2 to 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 682
22.4.9 TIMx capture/compare mode register 2 [alternate] (TIMx_CCMR2)
(x = 2 to 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 684
22.4.10 TIMx capture/compare mode register 2 [alternate] (TIMx_CCMR2)
(x = 2 to 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 685
22.4.11 TIMx capture/compare enable register
(TIMx_CCER)(x = 2 to 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 686
22.4.12 TIMx counter [alternate] (TIMx_CNT)(x = 2 to 4) . . . . . . . . . . . . . . . . . 687
22.4.13 TIMx counter [alternate] (TIMx_CNT)(x = 2 to 4) . . . . . . . . . . . . . . . . . 688
22.4.14 TIMx prescaler (TIMx_PSC)(x = 2 to 4) . . . . . . . . . . . . . . . . . . . . . . . . 688
22.4.15 TIMx auto-reload register (TIMx_ARR)(x = 2 to 4) . . . . . . . . . . . . . . . 689
22.4.16 TIMx capture/compare register 1 (TIMx_CCR1)(x = 2 to 4) . . . . . . . . 689
22.4.17 TIMx capture/compare register 2 (TIMx_CCR2)(x = 2 to 4) . . . . . . . . 690
22.4.18 TIMx capture/compare register 3 (TIMx_CCR3)(x = 2 to 4) . . . . . . . . 690
22.4.19 TIMx capture/compare register 4 (TIMx_CCR4)(x = 2 to 4) . . . . . . . . 691
22.4.20 TIMx DMA control register (TIMx_DCR)(x = 2 to 4) . . . . . . . . . . . . . . . 692
22.4.21 TIMx DMA address for full transfer (TIMx_DMAR)(x = 2 to 4) . . . . . . . 692
22.4.22 TIM2 option register 1 (TIM2_OR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . 692
22.4.23 TIM3 option register 1 (TIM3_OR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . 693
22.4.24 TIM4 option register 1 (TIM4_OR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . 694
22.4.25 TIM2 alternate function option register 1 (TIM2_AF1) . . . . . . . . . . . . . 694
22.4.26 TIM3 alternate function option register 1 (TIM3_AF1) . . . . . . . . . . . . . 695
22.4.27 TIM4 alternate function option register 1 (TIM4_AF1) . . . . . . . . . . . . . 695
22.4.28 TIM2 timer input selection register (TIM2_TISEL) . . . . . . . . . . . . . . . . 696
22.4.29 TIM3 timer input selection register (TIM3_TISEL) . . . . . . . . . . . . . . . . 696