ST STM32G0 1 Series

System configuration controller (SYSCFG) RM0444
252/1390 RM0444 Rev 5
Bits 31:24 Reserved, must be kept at reset value
Bit 23 PB2_CDEN: PB2 clamping diode enable bit
(1)
This bit is set and cleared by software. It enables (connects) a clamping diode to V
DD
on PB2
pin.
0: Disable
1: Enable
Bit 22 PB1_CDEN: PB1 clamping diode enable bit
(1)
This bit is set and cleared by software. It enables (connects) a clamping diode to V
DD
on PB1
pin.
0: Disable
1: Enable
Bit 21 PB0_CDEN: PB0 clamping diode enable bit
(1)
This bit is set and cleared by software. It enables (connects) a clamping diode to V
DD
on PB0
pin.
0: Disable
1: Enable
Bit 20 PA13_CDEN: PA13 clamping diode enable bit
(1)
This bit is set and cleared by software. It enables (connects) a clamping diode to V
DD
on
PA13 pin.
0: Disable
1: Enable
Bit 19 PA6_CDEN: PA6 clamping diode enable bit
(1)
This bit is set and cleared by software. It enables (connects) a clamping diode to V
DD
on PA6
pin.
0: Disable
1: Enable
Bit 18 PA5_CDEN: PA5 clamping diode enable bit
(1)
This bit is set and cleared by software. It enables (connects) a clamping diode to V
DD
on PA5
pin.
0: Disable
1: Enable
Bit 17 PA3_CDEN: PA3 clamping diode enable bit
(1)
This bit is set and cleared by software. It enables (connects) a clamping diode to V
DD
on PA3
pin.
0: Disable
1: Enable
Bit 16 PA1_CDEN: PA1 clamping diode enable bit
(1)
This bit is set and cleared by software. It enables (connects) a clamping diode to V
DD
on PA1
pin.
0: Disable
1: Enable
Bits 15:9 Reserved, must be kept at reset value
Bit 8 SRAM_PEF: SRAM parity error flag
This bit is set by hardware when an SRAM parity error is detected. It is cleared by software
by writing 1.
0: No SRAM parity error detected
1: SRAM parity error detected