Comparator (COMP) RM0444
454/1390 RM0444 Rev 5
Bit 31 LOCK: COMP2_CSR register lock
This bit is set by software and cleared by a system reset. It locks the comparator 3 control
bits. When locked, all register bits are read-only.
0: Not locked
1: Locked
Bit 30 VALUE: Comparator 2 output status
This bit is read-only. It reflects the level of the comparator 2 output after the polarity selector
and blanking, as indicated in Figure 68.
Bits 29:25 Reserved, must be kept at reset value
Bit 24:20 BLANKSEL[4:0]: Comparator 2 blanking source selector
This bitfield is controlled by software (if not locked). It selects the blanking source:
00000: None (no blanking)
xxxx1: TIM1 OC4
xxx1x: TIM1 OC5
xx1xx: TIM2 OC3
x1xxx: TIM3 OC3
1xxxx: TIM15 OC2
Bit 19:18 PWRMODE[1:0]: Comparator 2 power mode selector
This bitfield is controlled by software (if not locked). It selects the power consumption and as
a consequence the speed of the comparator 2:
00: High speed
01: Medium speed
others: Reserved
Bit 17:16 HYST[1:0]: Comparator 2 hysteresis selector
This bitfield is controlled by software (if not locked). It selects the hysteresis of the
comparator 2:
00: None
01: Low
10: Medium
11: High
Bit 15 POLARITY: Comparator 2 polarity selector
This bit is controlled by software (if not locked). It selects the comparator 2 output polarity:
0: Non-inverted
1: Inverted
Bit 14 WINOUT: Comparator 2 output selector
This bit is controlled by software (if not locked). It selects the comparator 2 output:
0: COMP2_VALUE
1: COMP1_VALUE XOR COMP2_VALUE (required for window mode, see Figure 69)
Bits 13:12 Reserved, must be kept at reset value
Bit 11 WINMODE: Comparator 2 non-inverting input selector for window mode
This bit is controlled by software (if not locked). It selects the signal for COMP2_INP input of
the comparator 2:
0: Signal selected with INPSEL[1:0] bitfield of this register
1: COMP1_INP signal of the comparator 1 (required for window mode, see Figure 69)
Bit 10 Reserved, must be kept at reset value
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