RM0444 Rev 5 675/1390
RM0444 General-purpose timers (TIM2/TIM3/TIM4)
701
Bits 21, 20, 6, 5, 4 TS[4:0]: Trigger selection
This bit-field selects the trigger input to be used to synchronize the counter.
00000: Internal Trigger 0 (ITR0)
00001: Internal Trigger 1 (ITR1)
00010: Internal Trigger 2 (ITR2)
00011: Internal Trigger 3 (ITR3)
00100: TI1 Edge Detector (TI1F_ED)
00101: Filtered Timer Input 1 (TI1FP1)
00110: Filtered Timer Input 2 (TI2FP2)
00111: External Trigger input (ETRF)
01000: Internal Trigger 4 (ITR4)
01001: Internal Trigger 5 (ITR5)
01010: Internal Trigger 6 (ITR6)
01011: Internal Trigger 7 (ITR7)
01100: Internal Trigger 8 (ITR8)
Others: Reserved
See Table 119: TIMx internal trigger connection on page 676 for more details on ITRx
meaning for each Timer.
Note: These bits must be changed only when they are not used (e.g. when SMS=000) to
avoid wrong edge detections at the transition.
Bit 3 OCCS: OCREF clear selection
This bit is used to select the OCREF clear source
0: OCREF_CLR_INT is connected to COMP1, COMP2 or COMP3 output depending on
TIMx_OR1.OCREF_CLR[1:0]
1: OCREF_CLR_INT is connected to ETRF
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