DocID024597 Rev 3 1691/1693
RM0351 Revision history
1692
08-Dec-2015
3
(continued)
Removed bit TIF from Section 28.6.4: TIM16&TIM17
status register (TIMx_SR).
Removed bit TG from Section 28.6.5: TIM16&TIM17
event generation register (TIMx_EGR).
Updated reset value to 0xFFFF in Section 28.6.10:
TIM16&TIM17 auto-reload register (TIMx_ARR).
TIM6/TIM7
Updated reset value to 0xFFFF in Section 29.4.8:
TIM6/TIM7 auto-reload register (TIMx_ARR).
LPTIM
Added Section 30.5: LPTIM low power modes.
RTC
Updated reference to TAMPTS bit in Section 34.3.13:
Time-stamp function.
Updated Table 172: Effect of low-power modes on RTC.
I2C
Updated Table 188: Effect of low-power modes on the
I2C.
Updated Table 175: STM32L4x6 I2C implementation.
USART
Replaced nCTS by CTS - nRTS by RTS - SCLK by CK.
Replaced "w" by "rc_w1" in Section 36.8.9: Interrupt flag
clear register (USARTx_ICR).
Updated Table 197: Effect of low-power modes on the
USART.
Updated RTOF bit description in Section 36.8.8:
Interrupt and status register (USARTx_ISR).
LPUART
Replaced nCTS by CTS - nRTS by RTS.
Updated Table 202: Effect of low-power modes on the
LPUART.
SWPMI
Updated Table 215: Effect of low-power modes on
SWPMI.
SDMMC
Updated limit from 48 to 50 MHz in Section 41.1:
SDMMC main features, Section 41.3: SDMMC
functional description, Section 41.8.1: SDMMC power
control register (SDMMC_POWER), Section 41.8.2:
SDMMC clock control register (SDMMC_CLKCR) and in
Section 41.8.4: SDMMC command register
(SDMMC_CMD).
USB
Updated Section : Choosing the value of TRDT in
OTG_GUSBCFG.
Updated TRDT bit description in Section 43.15.4: OTG
USB configuration register (OTG_GUSBCFG).
Added Table 261: TRDT values.
Table 281. Document revision history (continued)
Date Revision Changes